Revert "usb: dwc3: add dis_del_phy_power_chg_quirk"
authorWu Liang feng <wulf@rock-chips.com>
Wed, 10 Aug 2016 03:17:40 +0000 (11:17 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 16 Aug 2016 12:48:19 +0000 (20:48 +0800)
This reverts commit ffee25e68d518aed3a505543355bff1d961159ff.

Documentation/devicetree/bindings/usb/dwc3.txt
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/platform_data.h

index 8de381a44708d3d0c6f44e6eeebb563c0c5bee0e..f1806c4f21e8954418ed24f145c1bddadee62f15 100644 (file)
@@ -43,8 +43,6 @@ Optional properties:
  - snps,dis_u2_freeclk_exists_quirk: when set, clear the u2_freeclk_exists
                        in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
                        a free-running PHY clock.
- - snps,dis_del_phy_power_chg_quirk: when set core will change PHY power
-                       from P0 to P1/P2/P3 without delay.
  - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
                        utmi_l1_suspend_n, false when asserts utmi_sleep_n
  - snps,hird-threshold: HIRD threshold
index 8362558acb5f7025b9f34930ad571039f3a11dde..a12117a04be618ee2945d4df2d2e211d6301db87 100644 (file)
@@ -456,9 +456,6 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
        if (dwc->dis_u3_susphy_quirk)
                reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
 
-       if (dwc->dis_del_phy_power_chg_quirk)
-               reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
-
        dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
        reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
@@ -940,8 +937,6 @@ static int dwc3_probe(struct platform_device *pdev)
                                "snps,dis_enblslpm_quirk");
        dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
                                "snps,dis_u2_freeclk_exists_quirk");
-       dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev,
-                               "snps,dis_del_phy_power_chg_quirk");
        dwc->phyif_utmi_16_bits = device_property_read_bool(dev,
                                "snps,phyif_utmi_16_bits");
 
@@ -980,8 +975,6 @@ static int dwc3_probe(struct platform_device *pdev)
                dwc->dis_enblslpm_quirk = pdata->dis_enblslpm_quirk;
                dwc->dis_u2_freeclk_exists_quirk =
                                        pdata->dis_u2_freeclk_exists_quirk;
-               dwc->dis_del_phy_power_chg_quirk =
-                                       pdata->dis_del_phy_power_chg_quirk;
                dwc->phyif_utmi_16_bits = pdata->phyif_utmi_16_bits;
 
                dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
index c5d7a5e799623389e93ec2dfbbe2429ce3b9a7bb..32ac0dd5a97e7ceaca5c069619dcd6870599f31b 100644 (file)
@@ -737,8 +737,6 @@ struct dwc3_scratchpad_array {
  * @dis_u2_freeclk_exists_quirk : set if we clear u2_freeclk_exists
  *                     in GUSB2PHYCFG, specify that USB2 PHY doesn't
  *                     provide a free-running PHY clock.
- * @dis_del_phy_power_chg_quirk: set if we disable delay phy power
- *                     change quirk.
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  *     0       - -6dB de-emphasis
@@ -886,7 +884,6 @@ struct dwc3 {
        unsigned                dis_u2_susphy_quirk:1;
        unsigned                dis_enblslpm_quirk:1;
        unsigned                dis_u2_freeclk_exists_quirk:1;
-       unsigned                dis_del_phy_power_chg_quirk:1;
 
        unsigned                tx_de_emphasis_quirk:1;
        unsigned                tx_de_emphasis:2;
index b44e818c062eaff0c9832fb244705595dee35d97..aa5739a58c8670d328365e878f6954cce09574e6 100644 (file)
@@ -45,7 +45,6 @@ struct dwc3_platform_data {
        unsigned dis_u2_susphy_quirk:1;
        unsigned dis_enblslpm_quirk:1;
        unsigned dis_u2_freeclk_exists_quirk:1;
-       unsigned dis_del_phy_power_chg_quirk:1;
 
        unsigned tx_de_emphasis_quirk:1;
        unsigned tx_de_emphasis:2;