ARC: timer: rtc: implement read loop in "C" vs. inline asm

commit 922cc171998ac3dbe74d57011ef7ed57e9b0d7df upstream.

The current code doesn't even compile as somehow the inline assembly
can't see the register names defined as ARC_RTC_*
I'm pretty sure It worked when I first got it merged, but the tools were
definitely different then.

So better to write this in "C" anyways.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index dfad287f1db1c6b55b86faacc0b40d2472636795..dbedc576e4cad870e5682750740bc13aa81c9d92 100644 (file)
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -130,14 +130,17 @@ static cycle_t arc_counter_read(struct clocksource *cs)
                cycle_t  full;
        } stamp;
 
-
-       __asm__ __volatile(
-       "1:                                             \n"
-       "       lr              %0, [AUX_RTC_LOW]       \n"
-       "       lr              %1, [AUX_RTC_HIGH]      \n"
-       "       lr              %2, [AUX_RTC_CTRL]      \n"
-       "       bbit0.nt        %2, 31, 1b              \n"
-       : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
+       /*
+        * hardware has an internal state machine which tracks readout of
+        * low/high and updates the CTRL.status if
+        *  - interrupt/exception taken between the two reads
+        *  - high increments after low has been read
+        */
+       do {
+               stamp.low = read_aux_reg(AUX_RTC_LOW);
+               stamp.high = read_aux_reg(AUX_RTC_HIGH);
+               status = read_aux_reg(AUX_RTC_CTRL);
+       } while (!(status & _BITUL(31)));
 
        return stamp.full;
 }