video: rockchip: mipi: enable clk before write register

Change-Id: I717ed1143c53e7c2cd04697e8cc3984f89e29504
Signed-off-by: xubilv <xbl@rock-chips.com>

diff --git a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
index 4dd8f187b5f76e496778b13b6ac35686d58ed56d..018cb0810a3d37db2718f1438ff220387ab2bfe6 100755 (executable)
--- a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
+++ b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
@@ -457,7 +457,6 @@ static void rk312x_mipi_dsi_set_hs_clk(struct dsi *dsi)
 static int rk312x_phy_power_up(struct dsi *dsi)
 {
        /* enable ref clock */
-       rk312x_mipi_dsi_set_hs_clk(dsi);
        clk_prepare_enable(dsi->phy.refclk);
        clk_prepare_enable(dsi->dsi_pclk);
        clk_prepare_enable(dsi->dsi_host_pclk);
@@ -466,6 +465,7 @@ static int rk312x_phy_power_up(struct dsi *dsi)
 
        udelay(10);
 
+       rk312x_mipi_dsi_set_hs_clk(dsi);
        rk32_dsi_set_bits(dsi, 0xe4, DPHY_REGISTER1);
        switch (dsi->host.lane) {
        case 4: