RK3368: spi: spi0 2csn,spi1 2csn,sp2 1csn in dts config
authorHuibin Hong <huibin.hong@rock-chips.com>
Thu, 19 Mar 2015 09:54:54 +0000 (17:54 +0800)
committerHuibin Hong <huibin.hong@rock-chips.com>
Thu, 19 Mar 2015 09:54:54 +0000 (17:54 +0800)
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
arch/arm64/boot/dts/rk3368-tb_8846.dts
arch/arm64/boot/dts/rk3368.dtsi

index f683f5548c2aed7146bed417fa7a0e79b400f0cb..1c86af18af55757e329834c0ce838e7491c3992a 100644 (file)
                type = <0>;
                enable_dma = <0>;
        };
-
+       spi_test@11 {
+               compatible = "rockchip,spi_test_bus1_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               //spi-cpha;
+               //spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <1>;
+       };
        */
 };
 
                type = <0>;
                enable_dma = <0>;
        };
-
-       spi_test@21 {
-               compatible = "rockchip,spi_test_bus2_cs1";
-               reg = <1>;
-               spi-max-frequency = <24000000>;
-               //spi-cpha;
-               //spi-cpol;
-               poll_mode = <0>;
-               type = <0>;
-               enable_dma = <0>;
-       };
        */
 };
 
index 4d90d636dd9cb25186ec3b1bddf9da5507a02100..288de670d65b405d6c3efa4636b900d1c2cf475d 100755 (executable)
                #address-cells = <1>;
                #size-cells = <0>;
                pinctrl-names = "default";
-               pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
+               pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0 &spi1_cs1>;
                rockchip,spi-src-clk = <1>;
-               num-cs = <1>;
+               num-cs = <2>;
                clocks = <&clk_spi1>, <&clk_gates19 5>;
                clock-names = "spi", "pclk_spi1";
                //dmas = <&pdma1 13>, <&pdma1 14>;
                        spi1_tx: spi1-tx {
                                rockchip,pins = <1 GPIO_C1 RK_FUNC_2 &pcfg_pull_up>;
                        };
+                       spi1_cs1: spi1-cs1 {
+                               rockchip,pins = <3 GPIO_D4 RK_FUNC_2 &pcfg_pull_up>;
+                       };
                };
 
                spi2 {