dtsi: rk3368: add uart & jtag pcl func for sdmmc mux

Signed-off-by: lintao <lintao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index d1b7500af1baf8dccd7db1e6d26f8dc49dcb2607..2c7874fa83c37eff1a45979c5de95774b0cf0185 100755 (executable)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -358,9 +358,10 @@
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
-               pinctrl-names = "default", "idle";
+               pinctrl-names = "default", "idle", "udbg";
                pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_dectn &sdmmc_bus4>;
                pinctrl-1 = <&sdmmc_gpio>;
+               pinctrl-2 = <&uart2_xfer &cpu_jtag &sdmmc_dectn>;
                cd-gpios = <&gpio2 GPIO_B3 GPIO_ACTIVE_HIGH>;/*CD GPIO*/
                clocks = <&clk_sdmmc0>, <&clk_gates21 0>, <&clk_gates20 10>;
                clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
@@ -1984,6 +1985,13 @@
                                                 <3 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>;
                         };
                };
+
+               cpu_jtag {
+                       cpu_jtag: cpu-jtag {
+                               rockchip,pins = <2 GPIO_A7 RK_FUNC_2 &pcfg_pull_up>,
+                                               <2 GPIO_B0 RK_FUNC_2 &pcfg_pull_up>;
+                       };
+               };
        };
 
        reboot {