drm/rockchip: hdmi: Limit rk3229/rk3328 max output resolution
authorZheng Yang <zhengyang@rock-chips.com>
Tue, 11 Jul 2017 09:53:32 +0000 (17:53 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 12 Jul 2017 11:21:57 +0000 (19:21 +0800)
Limit RK3229/RK3328 max output resolution to 4K 50/60 YCbCr420 mode.

Change-Id: Icb934f6f057503ccb619f4ca6167b0958def336a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
drivers/gpu/drm/bridge/dw-hdmi.c
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

index 922587e990b3b04e0721340db0c90a8e562a3ca2..4e045fe934f50245ed3499462758d9def8d5cddd 100644 (file)
@@ -2019,6 +2019,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
                hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
        }
 
+       if ((hdmi->dev_type == RK3328_HDMI ||
+            hdmi->dev_type == RK3228_HDMI) &&
+           drm_match_cea_mode(mode) > 94 &&
+           mode->crtc_clock > 340000 &&
+           !(mode->flags & DRM_MODE_FLAG_420_MASK))
+               mode->flags |= DRM_MODE_FLAG_420;
+
        if (mode->flags & DRM_MODE_FLAG_420_MASK) {
                hdmi->hdmi_data.enc_in_bus_format =
                        MEDIA_BUS_FMT_UYYVYY8_0_5X24;
index 825c22c6d2d68f83329572a5b80a476a6a15e003..ed69ea722f3b91a6dbad26189f8fdfbd5433de56 100644 (file)
@@ -493,6 +493,18 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
                                      struct drm_connector_state *conn_state)
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+       struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
+
+       if (hdmi->phy) {
+               if (drm_match_cea_mode(&crtc_state->mode) > 94 &&
+                   crtc_state->mode.crtc_clock > 340000 &&
+                   !(crtc_state->mode.flags & DRM_MODE_FLAG_420_MASK)) {
+                       crtc_state->mode.flags |= DRM_MODE_FLAG_420;
+                       phy_set_bus_width(hdmi->phy, 4);
+               } else {
+                       phy_set_bus_width(hdmi->phy, 8);
+               }
+       }
 
        if (crtc_state->mode.flags & DRM_MODE_FLAG_420_MASK) {
                s->output_mode = ROCKCHIP_OUT_MODE_YUV420;