UPSTREAM: ARM: dts: rockchip: add rk3288 mipi_dsi nodes

Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.

Change-Id: I0181ec03b0c944a18391737ea6bb65c5b642a6ea
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit cab6f070ab53df0fa8a17e95ca7518a8c8e42e69)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 04ea209f1737f9fb052f4efc8589e98aa027836e..8b7d2861273030848b6d27a38eae21e88f0403f1 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -800,6 +800,10 @@
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopb>;
                        };
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopb>;
                        };

+                       vopb_out_mipi: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&mipi_in_vopb>;
+                       };

                };
        };
 
                };
        };
 


@@ -833,6 +837,10 @@
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopl>;
                        };
                                reg = <0>;
                                remote-endpoint = <&hdmi_in_vopl>;
                        };

+                       vopl_out_mipi: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&mipi_in_vopl>;
+                       };

                };
        };
 
                };
        };
 


@@ -846,6 +854,37 @@
                status = "disabled";
        };
 
                status = "disabled";
        };
 

+       mipi_dsi: mipi@ff960000 {
+               compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+               reg = <0xff960000 0x4000>;
+               interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+               clock-names = "ref", "pclk";
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       mipi_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               mipi_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_mipi>;
+                               };
+                               mipi_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_mipi>;
+                               };
+                       };
+               };
+       };
+

        hdmi: hdmi@ff980000 {
                compatible = "rockchip,rk3288-dw-hdmi";
                reg = <0xff980000 0x20000>;
        hdmi: hdmi@ff980000 {
                compatible = "rockchip,rk3288-dw-hdmi";
                reg = <0xff980000 0x20000>;