usb: host: xhci-plat: set xhci suspend quirk based on platform data
authorWu Liang feng <wulf@rock-chips.com>
Mon, 16 May 2016 10:06:03 +0000 (18:06 +0800)
committerWu Liang feng <wulf@rock-chips.com>
Tue, 17 May 2016 09:46:45 +0000 (17:46 +0800)
If an xhci platform need an extraordinary delay to wait for
xHCI enter the Halted state after the Run/Stop (R/S) bit is
cleared to '0', then enable XHCI_SLOW_SUSPEND quirk flag.

Change-Id: If37fe7b7b37cc3c573361f4ef522404ebe39991e
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
drivers/usb/host/xhci-plat.c
include/linux/usb/xhci_pdriver.h

index 05647e6753cd833f9b9e87924832be5d3e2c2216..9fe957a1b10c1896ad03f8d94ba9c11e81560785 100644 (file)
@@ -38,12 +38,22 @@ static const struct xhci_driver_overrides xhci_plat_overrides __initconst = {
 
 static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
 {
+       struct usb_xhci_pdata *pdata = dev_get_platdata(dev);
+
        /*
         * As of now platform drivers don't provide MSI support so we ensure
         * here that the generic code does not try to make a pci_dev from our
         * dev struct in order to setup MSI
         */
        xhci->quirks |= XHCI_PLAT;
+
+       /*
+        * On some xHCI controllers (e.g. Rockchip SoCs), it need an
+        * extraordinary delay to wait for xHCI enter the Halted state
+        * after the Run/Stop (R/S) bit is cleared to '0'.
+        */
+       if (pdata && pdata->xhci_slow_suspend)
+               xhci->quirks |= XHCI_SLOW_SUSPEND;
 }
 
 /* called during probe() after chip reset completes */
index 376654b5b0f79603799567871110b0eb4ee2ebe3..6b3c1046b8e03ae77d2dfbcfdc22209c1db19463 100644 (file)
  *
  * @usb3_lpm_capable:  determines if this xhci platform supports USB3
  *                     LPM capability
+ * @xhci_slow_suspend: set if this xhci platform need an extraordinary
+ *                     delay to wait for xHC enter the Halted state
+ *                     after the Run/Stop (R/S) bit is cleared to '0'.
  *
  */
 struct usb_xhci_pdata {
        unsigned        usb3_lpm_capable:1;
+       unsigned        xhci_slow_suspend:1;
 };
 
 #endif /* __USB_CORE_XHCI_PDRIVER_H */