dts: rockchip: add cru regmap refnode for mmc
authorShawn Lin <shawn.lin@rock-chips.com>
Fri, 10 Jul 2015 06:01:59 +0000 (14:01 +0800)
committerShawn Lin <shawn.lin@rock-chips.com>
Fri, 10 Jul 2015 06:05:02 +0000 (14:05 +0800)
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
arch/arm/boot/dts/rk312x.dtsi
arch/arm/boot/dts/rk3288.dtsi [changed mode: 0644->0755]
arch/arm64/boot/dts/rk3368.dtsi [changed mode: 0644->0755]

index 46fb32d7b5c93633f6b17105a2cc4fd50628e30d..f8610a3ebcccc3dcb94a127f867186033b793946 100755 (executable)
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <8>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <3>;
         };
 
 
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <1>;
        };
 
        sdio: rksdmmc@10218000 {
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <2>;
        };
        
        spi0: spi@20074000 {
old mode 100644 (file)
new mode 100755 (executable)
index 7156684..bd78759
                fifo-depth = <0x100>;
                bus-width = <8>;
                tune_regsbase = <0x218>;
+               cru_regsbase = <0x1d8>;
+               cru_reset_offset = <3>;
        };
 
        sdmmc: rksdmmc@ff0c0000 {
                fifo-depth = <0x100>;
                bus-width = <4>;
                tune_regsbase = <0x200>;
+               cru_regsbase = <0x1d8>;
+               cru_reset_offset = <0>;
        };
 
        sdio: rksdmmc@ff0d0000 {
                fifo-depth = <0x100>;
                bus-width = <4>;
                tune_regsbase = <0x208>;
+               cru_regsbase = <0x1d8>;
+               cru_reset_offset = <1>;
        };
 
        sdio1: rksdmmc@ff0e0000 {
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
+               cru_regsbase = <0x1d8>;
+               cru_reset_offset = <2>;
                status = "disabled";
        };
 
old mode 100644 (file)
new mode 100755 (executable)
index e953d16..5698f9a
                clocks = <&clk_emmc>, <&clk_gates21 2>, <&clk_gates20 10>;
                clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
                rockchip,grf = <&grf>;
+               rockchip,cru = <&cru>;
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <8>;
                tune_regsbase = <0x418>;
+               cru_regsbase = <0x320>;
+               cru_reset_offset = <3>;
        };
 
        sdmmc: rksdmmc@ff0c0000 {
                clocks = <&clk_sdmmc0>, <&clk_gates21 0>, <&clk_gates20 10>;
                clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
                rockchip,grf = <&grf>;
+               rockchip,cru = <&cru>;
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
                tune_regsbase = <0x400>;
+               cru_regsbase = <0x320>;
+               cru_reset_offset = <0>;
        };
 
        sdio: rksdmmc@ff0d0000 {
                clocks = <&clk_sdio0>, <&clk_gates21 1>, <&clk_gates20 10>;
                clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
                rockchip,grf = <&grf>;
+               rockchip,cru = <&cru>;
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
                tune_regsbase = <0x408>;
+               cru_regsbase = <0x320>;
+               cru_reset_offset = <1>;
        };
 
        spi0: spi@ff110000 {