usb: dwc3: add a quirk xhci_slow_suspend_quirk
authorWu Liang feng <wulf@rock-chips.com>
Wed, 10 Aug 2016 12:55:53 +0000 (20:55 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 17 Aug 2016 10:33:22 +0000 (18:33 +0800)
On some xHCI controllers (e.g. Rockchip SoCs), which are
integrated in DWC3 IP, need an extraordinary delay to wait
for xHCI enter the Halted state(i.e. HCH in the USBSTS
register is '1'), especially if DWC3 is in DRD mode.

Change-Id: I67c84d4768df95f7616d6716a77cf743e4334122
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Documentation/devicetree/bindings/usb/dwc3.txt
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/host.c

index e96bfc20907e6d59ada373195d0821a42266acab..0099e2fbed0110c673a0b76bb6027ad276396625 100644 (file)
@@ -44,6 +44,9 @@ Optional properties:
                        a free-running PHY clock.
  - snps,dis-del-phy-power-chg-quirk: when set core will change PHY power
                        from P0 to P1/P2/P3 without delay.
+ - snps,xhci-slow-suspend-quirk: when set, need an extraordinary delay to wait
+                       for xHC enter the Halted state (i.e. HCH in the USBSTS
+                       register is '1').
  - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
                        utmi_l1_suspend_n, false when asserts utmi_sleep_n
  - snps,hird-threshold: HIRD threshold
index 99a42212e4c2eb44c622bc097f8f1b30684ef35d..270dbede8852f016f063506da0a32fa8aa74c3b7 100644 (file)
@@ -967,6 +967,8 @@ static int dwc3_probe(struct platform_device *pdev)
                                "snps,dis-u2-freeclk-exists-quirk");
        dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev,
                                "snps,dis-del-phy-power-chg-quirk");
+       dwc->xhci_slow_suspend_quirk = device_property_read_bool(dev,
+                               "snps,xhci-slow-suspend-quirk");
 
        dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
                                "snps,tx_de_emphasis_quirk");
index a765b043228e5f9c37338625b1267bb884f6679f..d11303373a9ba08b9d9e63db3baf59cb5a458aeb 100644 (file)
@@ -813,6 +813,9 @@ struct dwc3_scratchpad_array {
  *                     provide a free-running PHY clock.
  * @dis_del_phy_power_chg_quirk: set if we disable delay phy power
  *                     change quirk.
+ * @xhci_slow_suspend_quirk: set if need an extraordinary delay to wait
+ *                     for xHC enter the Halted state after the Run/Stop
+ *                     (R/S) bit is cleared to '0'.
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  *     0       - -6dB de-emphasis
@@ -959,6 +962,7 @@ struct dwc3 {
        unsigned                dis_rxdet_inp3_quirk:1;
        unsigned                dis_u2_freeclk_exists_quirk:1;
        unsigned                dis_del_phy_power_chg_quirk:1;
+       unsigned                xhci_slow_suspend_quirk:1;
 
        unsigned                tx_de_emphasis_quirk:1;
        unsigned                tx_de_emphasis:2;
index 2903c9102cbd8fa9fa1b8d05f6e93d888c53c359..971d95163ce6fa9f375b34a0658863b76f2a575f 100644 (file)
@@ -92,6 +92,7 @@ int dwc3_host_init(struct dwc3 *dwc)
        memset(&pdata, 0, sizeof(pdata));
 
        pdata.usb3_lpm_capable = dwc->usb3_lpm_capable;
+       pdata.xhci_slow_suspend = dwc->xhci_slow_suspend_quirk;
 
        ret = platform_device_add_data(xhci, &pdata, sizeof(pdata));
        if (ret) {