ARM64: dts: rockchip: fix errors of i2c1 and i2c2

The regs and clocks of i2c1 and i2c2 are uncorrect,
fix it by swapping their address and clock id.

Change-Id: I3df9fa8e82703204a8ca7c485d63197eaa62e85e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 54d31f4bb5b09520f57026a5116f36bf67b4f266..0134ef33504f31ac0305a5067975f0e0f0fd91c9 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -333,16 +333,16 @@
                status = "disabled";
        };
 
-       i2c1: i2c@ff140000 {
+       i2c2: i2c@ff140000 {
                compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
                reg = <0x0 0xff140000 0x0 0x1000>;
                interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                clock-names = "i2c";
-               clocks = <&cru PCLK_I2C1>;
+               clocks = <&cru PCLK_I2C2>;
                pinctrl-names = "default";
-               pinctrl-0 = <&i2c1_xfer>;
+               pinctrl-0 = <&i2c2_xfer>;
                status = "disabled";
        };
 
@@ -492,16 +492,16 @@
                status = "disabled";
        };
 
-       i2c2: i2c@ff660000 {
+       i2c1: i2c@ff660000 {
                compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
                reg = <0x0 0xff660000 0x0 0x1000>;
                interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                clock-names = "i2c";
-               clocks = <&cru PCLK_I2C2>;
+               clocks = <&cru PCLK_I2C1>;
                pinctrl-names = "default";
-               pinctrl-0 = <&i2c2_xfer>;
+               pinctrl-0 = <&i2c1_xfer>;
                status = "disabled";
        };