rk3228: gpu: fix rk3228 gpu pd issue
authorSimon Xue <xxm@rock-chips.com>
Fri, 16 Oct 2015 02:38:12 +0000 (10:38 +0800)
committerSimon Xue <xxm@rock-chips.com>
Fri, 16 Oct 2015 02:44:45 +0000 (10:44 +0800)
1. For compatible with other SOC,more dig into gpu pd when init gpu pd
2. Add cpu_is_rk3228 macro for gpu

Change-Id: I3adf4ab32d98c0cfebb0f0e769fac1b84f525c6f
Signed-off-by: Simon Xue <xxm@rock-chips.com>
drivers/gpu/arm/mali400/mali/platform/rk30/mali_platform.c [changed mode: 0755->0644]
drivers/gpu/arm/mali400/mali/platform/rk30/rk3066.c [changed mode: 0755->0644]

old mode 100755 (executable)
new mode 100644 (file)
index 2e233e0..f317c29
@@ -78,14 +78,20 @@ static int mali_clock_init(struct device *dev)
        drv_data->pd = devm_clk_get(dev, "pd_gpu");
        if (IS_ERR(drv_data->pd)) {
                ret = PTR_ERR(drv_data->pd);
-               dev_err(dev, "get pd_clk failed, %d\n", ret);
-               return ret;
+               /* rk3228 gpu has no power domain,save NULL for compatible*/
+               if (ret != -ENOENT) {
+                       dev_err(dev, "get pd_clk failed, %d\n", ret);
+                       return ret;
+               }
+               drv_data->pd = NULL;
        }
 
-       ret = clk_prepare_enable(drv_data->pd);
-       if (ret) {
-               dev_err(dev, "prepare pd_clk failed, %d\n", ret);
-               return ret;
+       if (drv_data->pd) {
+               ret = clk_prepare_enable(drv_data->pd);
+               if (ret) {
+                       dev_err(dev, "prepare pd_clk failed, %d\n", ret);
+                       return ret;
+               }
        }
 
        drv_data->clk = clk_get_dvfs_node("clk_gpu");
@@ -111,7 +117,8 @@ static void mali_clock_term(struct device *dev)
        struct mali_platform_drv_data *drv_data = dev_get_drvdata(dev);
 
        dvfs_clk_disable_unprepare(drv_data->clk);
-       clk_disable_unprepare(drv_data->pd);
+       if (drv_data->pd)
+               clk_disable_unprepare(drv_data->pd);
        drv_data->power_state = false;
 }
 
@@ -308,13 +315,15 @@ _mali_osk_errcode_t mali_power_domain_control(u32 bpower_off)
        if (bpower_off == 0) {
                if (!drv_data->power_state) {
                        dvfs_clk_prepare_enable(drv_data->clk);
-                       clk_prepare_enable(drv_data->pd);
+                       if (drv_data->pd)
+                               clk_prepare_enable(drv_data->pd);
                        drv_data->power_state = true;
                }
        } else if (bpower_off == 1) {
                if (drv_data->power_state) {
                        dvfs_clk_disable_unprepare(drv_data->clk);
-                       clk_disable_unprepare(drv_data->pd);
+                       if (drv_data->pd)
+                               clk_disable_unprepare(drv_data->pd);
                        drv_data->power_state = false;
                }
        }
old mode 100755 (executable)
new mode 100644 (file)
index 4aabe0d..f76b69e
@@ -196,6 +196,8 @@ int mali_platform_device_init(struct platform_device *pdev)
                num_pp_cores = 1;
        else if (cpu_is_rk3188())
                num_pp_cores = 4;
+       else if (cpu_is_rk3228())
+               num_pp_cores = 2;
 
        mali_platform_device_add_config(pdev);