drm/rockchip: add dither config for connected panel
authorHuang Jiachai <hjc@rock-chips.com>
Thu, 8 Dec 2016 13:03:54 +0000 (21:03 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 9 Dec 2016 03:03:24 +0000 (11:03 +0800)
Change-Id: Ia57d2ab75718d0a7a8b386a7d50e2e23011baeb2
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
drivers/gpu/drm/panel/panel-simple.c
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
drivers/gpu/drm/rockchip/inno_hdmi.c
drivers/gpu/drm/rockchip/rockchip_drm_drv.h
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
drivers/gpu/drm/rockchip/rockchip_drm_vop.h
drivers/gpu/drm/rockchip/rockchip_lvds.c

index 99d78eeec0366add68c733dc5392e183e8bf34ca..252c27d21d0fe0bf1a9acc527855fbaef010fb57 100644 (file)
@@ -1036,6 +1036,7 @@ static const struct panel_desc lg_lp079qx1_sp0v = {
                .width = 129,
                .height = 171,
        },
                .width = 129,
                .height = 171,
        },
+       .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
 };
 
 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
 };
 
 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
index f32b39a2b0c34dd13bc68976e9ca22d32d001448..434f634997252455438b3bfe663a1e43fc361566 100644 (file)
@@ -169,6 +169,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
                                      struct drm_connector_state *conn_state)
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
                                      struct drm_connector_state *conn_state)
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+       struct drm_connector *connector = conn_state->connector;
+       struct drm_display_info *info = &connector->display_info;
 
        /*
         * The hardware IC designed that VOP must output the RGB10 video
 
        /*
         * The hardware IC designed that VOP must output the RGB10 video
@@ -179,6 +181,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
         */
        s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
        s->output_type = DRM_MODE_CONNECTOR_eDP;
         */
        s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
        s->output_type = DRM_MODE_CONNECTOR_eDP;
+       if (info->num_bus_formats)
+               s->bus_format = info->bus_formats[0];
 
        return 0;
 }
 
        return 0;
 }
index f261dd97e130d0ee0a8ad285b4356b0e491b459d..0539b6e40b23180883802252ddb410868f08a4fb 100644 (file)
@@ -973,6 +973,8 @@ dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder,
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
        struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
        struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
+       struct drm_connector *connector = conn_state->connector;
+       struct drm_display_info *info = &connector->display_info;
 
        switch (dsi->format) {
        case MIPI_DSI_FMT_RGB888:
 
        switch (dsi->format) {
        case MIPI_DSI_FMT_RGB888:
@@ -990,6 +992,8 @@ dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder,
        }
 
        s->output_type = DRM_MODE_CONNECTOR_DSI;
        }
 
        s->output_type = DRM_MODE_CONNECTOR_DSI;
+       if (info->num_bus_formats)
+               s->bus_format = info->bus_formats[0];
 
        return 0;
 }
 
        return 0;
 }
index 52ac77e0130dc74648ff2dc4aac98950038ca78e..02e424b6f3ad06c055bbc44ed88fa6f9249321af 100644 (file)
@@ -394,6 +394,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
 
        s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
        s->output_type = DRM_MODE_CONNECTOR_HDMIA;
 
        s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
        s->output_type = DRM_MODE_CONNECTOR_HDMIA;
+       s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 
        return 0;
 }
 
        return 0;
 }
index f9d1fbb0cbc3e9d115d2b721430143f6050c273a..97eada48177774b4f48ee762d2c94d9f5ab7b279 100644 (file)
@@ -589,6 +589,7 @@ inno_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
 
        s->output_mode = ROCKCHIP_OUT_MODE_P888;
        s->output_type = DRM_MODE_CONNECTOR_HDMIA;
 
        s->output_mode = ROCKCHIP_OUT_MODE_P888;
        s->output_type = DRM_MODE_CONNECTOR_HDMIA;
+       s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 
        return 0;
 }
 
        return 0;
 }
index 72db38bfe84c56930960d43dd4f40d38f786ef89..77860ef22364070c6293f455e07aae1bf62417e2 100644 (file)
@@ -73,6 +73,7 @@ struct rockchip_crtc_state {
        int dsp_layer_sel;
        int output_type;
        int output_mode;
        int dsp_layer_sel;
        int output_type;
        int output_mode;
+       int bus_format;
 };
 
 #define to_rockchip_crtc_state(s) \
 };
 
 #define to_rockchip_crtc_state(s) \
index d4bf02066b11cb61bc1df2153146319bd292e476..b06fb556de544079d9cb40c841efc28de668086e 100644 (file)
@@ -1412,6 +1412,23 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
                s->output_mode = ROCKCHIP_OUT_MODE_P888;
 
        VOP_CTRL_SET(vop, out_mode, s->output_mode);
                s->output_mode = ROCKCHIP_OUT_MODE_P888;
 
        VOP_CTRL_SET(vop, out_mode, s->output_mode);
+       switch (s->bus_format) {
+       case MEDIA_BUS_FMT_RGB565_1X16:
+               val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB565) |
+                       PRE_DITHER_DOWN_EN(1);
+               break;
+       case MEDIA_BUS_FMT_RGB666_1X18:
+       case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+               val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666) |
+                       PRE_DITHER_DOWN_EN(1);
+               break;
+       case MEDIA_BUS_FMT_RGB888_1X24:
+       default:
+               val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+               break;
+       }
+       val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
+       VOP_CTRL_SET(vop, dither_down, val);
 
        VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
        val = hact_st << 16;
 
        VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
        val = hact_st << 16;
index 5d2d3ced7689286e337363146d01806f6fd45e8e..b15288b1720e96ca72f11286bd140b1d9a3f2c19 100644 (file)
@@ -378,6 +378,20 @@ enum scale_down_mode {
        SCALE_DOWN_AVG = 0x1
 };
 
        SCALE_DOWN_AVG = 0x1
 };
 
+enum dither_down_mode {
+       RGB888_TO_RGB565 = 0x0,
+       RGB888_TO_RGB666 = 0x1
+};
+
+enum dither_down_mode_sel {
+       DITHER_DOWN_ALLEGRO = 0x0,
+       DITHER_DOWN_FRC = 0x1
+};
+
+#define PRE_DITHER_DOWN_EN(x)  ((x) << 0)
+#define DITHER_DOWN_EN(x)      ((x) << 1)
+#define DITHER_DOWN_MODE(x)    ((x) << 2)
+#define DITHER_DOWN_MODE_SEL(x)        ((x) << 3)
 #define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT  12
 #define SCL_MAX_VSKIPLINES             4
 #define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT  12
 #define SCL_MAX_VSKIPLINES             4
index 2649a044f2bb627267bcbb9f91a6f2f28f158dfe..e0eb524d0205351015f6ae325031fd90b1948135 100644 (file)
@@ -376,9 +376,13 @@ rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
                                   struct drm_connector_state *conn_state)
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
                                   struct drm_connector_state *conn_state)
 {
        struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+       struct drm_connector *connector = conn_state->connector;
+       struct drm_display_info *info = &connector->display_info;
 
        s->output_mode = ROCKCHIP_OUT_MODE_P888;
        s->output_type = DRM_MODE_CONNECTOR_LVDS;
 
        s->output_mode = ROCKCHIP_OUT_MODE_P888;
        s->output_type = DRM_MODE_CONNECTOR_LVDS;
+       if (info->num_bus_formats)
+               s->bus_format = info->bus_formats[0];
 
        return 0;
 }
 
        return 0;
 }