ARM: rockchip: add grf.h

diff --git a/arch/arm/mach-rockchip/grf.h b/arch/arm/mach-rockchip/grf.h
new file mode 100644 (file)
index 0000000..c01b4d9
--- /dev/null
+++ b/arch/arm/mach-rockchip/grf.h
@@ -0,0 +1,109 @@
+#ifndef __MACH_ROCKCHIP_GRF_H
+#define __MACH_ROCKCHIP_GRF_H
+
+#define RK3188_GRF_GPIO0L_DIR           0x0000
+#define RK3188_GRF_GPIO0H_DIR           0x0004
+#define RK3188_GRF_GPIO1L_DIR           0x0008
+#define RK3188_GRF_GPIO1H_DIR           0x000c
+#define RK3188_GRF_GPIO2L_DIR           0x0010
+#define RK3188_GRF_GPIO2H_DIR           0x0014
+#define RK3188_GRF_GPIO3L_DIR           0x0018
+#define RK3188_GRF_GPIO3H_DIR           0x001c
+#define RK3188_GRF_GPIO0L_DO            0x0020
+#define RK3188_GRF_GPIO0H_DO            0x0024
+#define RK3188_GRF_GPIO1L_DO            0x0028
+#define RK3188_GRF_GPIO1H_DO            0x002c
+#define RK3188_GRF_GPIO2L_DO            0x0030
+#define RK3188_GRF_GPIO2H_DO            0x0034
+#define RK3188_GRF_GPIO3L_DO            0x0038
+#define RK3188_GRF_GPIO3H_DO            0x003c
+#define RK3188_GRF_GPIO0L_EN            0x0040
+#define RK3188_GRF_GPIO0H_EN            0x0044
+#define RK3188_GRF_GPIO1L_EN            0x0048
+#define RK3188_GRF_GPIO1H_EN            0x004c
+#define RK3188_GRF_GPIO2L_EN            0x0050
+#define RK3188_GRF_GPIO2H_EN            0x0054
+#define RK3188_GRF_GPIO3L_EN            0x0058
+#define RK3188_GRF_GPIO3H_EN            0x005c
+
+#define RK3188_GRF_GPIO0C_IOMUX         0x0068
+#define RK3188_GRF_GPIO0D_IOMUX         0x006c
+#define RK3188_GRF_GPIO1A_IOMUX         0x0070
+#define RK3188_GRF_GPIO1B_IOMUX         0x0074
+#define RK3188_GRF_GPIO1C_IOMUX         0x0078
+#define RK3188_GRF_GPIO1D_IOMUX         0x007c
+#define RK3188_GRF_GPIO2A_IOMUX         0x0080
+#define RK3188_GRF_GPIO2B_IOMUX         0x0084
+#define RK3188_GRF_GPIO2C_IOMUX         0x0088
+#define RK3188_GRF_GPIO2D_IOMUX         0x008c
+#define RK3188_GRF_GPIO3A_IOMUX         0x0090
+#define RK3188_GRF_GPIO3B_IOMUX         0x0094
+#define RK3188_GRF_GPIO3C_IOMUX         0x0098
+#define RK3188_GRF_GPIO3D_IOMUX         0x009c
+#define RK3188_GRF_SOC_CON0             0x00a0
+#define RK3188_GRF_SOC_CON1             0x00a4
+#define RK3188_GRF_SOC_CON2             0x00a8
+#define RK3188_GRF_SOC_STATUS0          0x00ac
+#define RK3188_GRF_DMAC1_CON0           0x00b0
+#define RK3188_GRF_DMAC1_CON1           0x00b4
+#define RK3188_GRF_DMAC1_CON2           0x00b8
+#define RK3188_GRF_DMAC2_CON0           0x00bc
+#define RK3188_GRF_DMAC2_CON1           0x00c0
+#define RK3188_GRF_DMAC2_CON2           0x00c4
+#define RK3188_GRF_DMAC2_CON3           0x00c8
+#define RK3188_GRF_CPU_CON0             0x00cc
+#define RK3188_GRF_CPU_CON1             0x00d0
+#define RK3188_GRF_CPU_CON2             0x00d4
+#define RK3188_GRF_CPU_CON3             0x00d8
+#define RK3188_GRF_CPU_CON4             0x00dc
+#define RK3188_GRF_CPU_CON5             0x00e0
+
+#define RK3188_GRF_DDRC_CON0            0x00ec
+#define RK3188_GRF_DDRC_STAT            0x00f0
+#define RK3188_GRF_IO_CON0              0x00f4
+#define RK3188_GRF_IO_CON1              0x00f8
+#define RK3188_GRF_IO_CON2              0x00fc
+#define RK3188_GRF_IO_CON3              0x0100
+#define RK3188_GRF_IO_CON4              0x0104
+#define RK3188_GRF_SOC_STATUS1          0x0108
+#define RK3188_GRF_UOC0_CON0            0x010c
+#define RK3188_GRF_UOC0_CON1            0x0110
+#define RK3188_GRF_UOC0_CON2            0x0114
+#define RK3188_GRF_UOC0_CON3            0x0118
+#define RK3188_GRF_UOC1_CON0            0x011c
+#define RK3188_GRF_UOC1_CON1            0x0120
+#define RK3188_GRF_UOC1_CON2            0x0124
+#define RK3188_GRF_UOC1_CON3            0x0128
+#define RK3188_GRF_UOC2_CON0            0x012c
+#define RK3188_GRF_UOC2_CON1            0x0130
+
+#define RK3188_GRF_UOC3_CON0            0x0138
+#define RK3188_GRF_UOC3_CON1            0x013c
+#define RK3188_GRF_HSIC_STAT            0x0140
+#define RK3188_GRF_OS_REG0              0x0144
+#define RK3188_GRF_OS_REG1              0x0148
+#define RK3188_GRF_OS_REG2              0x014c
+#define RK3188_GRF_OS_REG3              0x0150
+#define RK3188_GRF_OS_REG4              0x0154
+#define RK3188_GRF_OS_REG5              0x0158
+#define RK3188_GRF_OS_REG6              0x015c
+#define RK3188_GRF_OS_REG7              0x0160
+#define RK3188_GRF_GPIO0B_PULL          0x0164
+#define RK3188_GRF_GPIO0C_PULL          0x0168
+#define RK3188_GRF_GPIO0D_PULL          0x016c
+#define RK3188_GRF_GPIO1A_PULL          0x0170
+#define RK3188_GRF_GPIO1B_PULL          0x0174
+#define RK3188_GRF_GPIO1C_PULL          0x0178
+#define RK3188_GRF_GPIO1D_PULL          0x017c
+#define RK3188_GRF_GPIO2A_PULL          0x0180
+#define RK3188_GRF_GPIO2B_PULL          0x0184
+#define RK3188_GRF_GPIO2C_PULL          0x0188
+#define RK3188_GRF_GPIO2D_PULL          0x018c
+#define RK3188_GRF_GPIO3A_PULL          0x0190
+#define RK3188_GRF_GPIO3B_PULL          0x0194
+#define RK3188_GRF_GPIO3C_PULL          0x0198
+#define RK3188_GRF_GPIO3D_PULL          0x019c
+#define RK3188_GRF_FLASH_DATA_PULL      0x01a0
+#define RK3188_GRF_FLASH_CMD_PULL       0x01a4
+
+#endif