rk3128: not gating pwm-clocks, in suspend

Signed-off-by: 许盛飞 <xsf@rock-chips.com>

diff --git a/arch/arm/boot/dts/rk312x-clocks.dtsi b/arch/arm/boot/dts/rk312x-clocks.dtsi
index 20ea35fc5f2a893c82069887cdf8cea02ce94d7a..a2c62f302b79514434ffe60aae037993f0d71f9a 100755 (executable)
--- a/arch/arm/boot/dts/rk312x-clocks.dtsi
+++ b/arch/arm/boot/dts/rk312x-clocks.dtsi
@@ -1805,7 +1805,7 @@
                                                "g_pclk_spi0",          "reserved",
                                                "g_pclk_saradc",                "g_pclk_wdt";
 
-                                       rockchip,suspend-clkgating-setting = <0x8080 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x8480 0x0000>;
 
                                        #clock-cells = <1>;
                                };

diff --git a/arch/arm/mach-rockchip/pm-rk312x.c b/arch/arm/mach-rockchip/pm-rk312x.c
index b5842f512368299f2c21855234ff6d5a91e2a6c0..22d4968d15fd5c4903f433041f65bf55c384b0cc 100644 (file)
--- a/arch/arm/mach-rockchip/pm-rk312x.c
+++ b/arch/arm/mach-rockchip/pm-rk312x.c
@@ -935,9 +935,9 @@ void PIE_FUNC(pwm_regulator_suspend)(void)
                grf_writel(0x01000000, 0xb4);/*iomux  gpio0d2*/
                gpio0_inout = readl_relaxed(RK_GPIO_VIRT(0) + 0x04);
                gpio0_ddr = readl_relaxed(RK_GPIO_VIRT(0));
-               writel_relaxed(gpio0_inout | 0x08000000, RK_GPIO_VIRT(0) + 0x04);
+               writel_relaxed(gpio0_inout | 0x10000000, RK_GPIO_VIRT(0) + 0x04);
                dsb();
-               writel_relaxed(gpio0_ddr | 0x08000000, RK_GPIO_VIRT(0));
+               writel_relaxed(gpio0_ddr | 0x10000000, RK_GPIO_VIRT(0));
        }
        cru_writel(0x1e000000 | clk_gates8, 0xf0);
        sram_udelay(30);
@@ -952,13 +952,13 @@ void PIE_FUNC(pwm_regulator_resume)(void)
        clk_gates8 = cru_readl(0xf0);
        cru_writel(0x1e000000, 0xf0);
        if (rkpm_chk_sram_ctrbit(RKPM_CTR_VOL_PWM0)) {
+               grf_writel(0x00100010, 0xb4);/*iomux  gpio0d2*/
                gpio0_inout = readl_relaxed(RK_GPIO_VIRT(0) + 0x04);
                gpio0_ddr = readl_relaxed(RK_GPIO_VIRT(0));
                writel_relaxed(gpio0_inout | 0x04000000, RK_GPIO_VIRT(0)
                        + 0x04);
                dsb();
                writel_relaxed(gpio0_ddr &  ~0x04000000, RK_GPIO_VIRT(0));
-               grf_writel(0x00100010, 0xb4);/*iomux  gpio0d2*/
        }
 
        if (rkpm_chk_sram_ctrbit(RKPM_CTR_VOL_PWM1)) {
@@ -972,13 +972,13 @@ void PIE_FUNC(pwm_regulator_resume)(void)
        }
 
        if (rkpm_chk_sram_ctrbit(RKPM_CTR_VOL_PWM2)) {
+               grf_writel(0x01001000, 0xb4);/*iomux  gpio0d2*/
                gpio0_inout = readl_relaxed(RK_GPIO_VIRT(0) + 0x04);
                gpio0_ddr = readl_relaxed(RK_GPIO_VIRT(0));
-               writel_relaxed(gpio0_inout | 0x08000000, RK_GPIO_VIRT(0)
+               writel_relaxed(gpio0_inout | 0x10000000, RK_GPIO_VIRT(0)
                        + 0x04);
                dsb();
-               writel_relaxed(gpio0_ddr | ~0x08000000, RK_GPIO_VIRT(0));
-               grf_writel(0x01001000, 0xb4);/*iomux  gpio0d2*/
+               writel_relaxed(gpio0_ddr | ~0x10000000, RK_GPIO_VIRT(0));
        }
        cru_writel(0x1e000000 | clk_gates8, 0xf0);
        sram_udelay(30);