arm64: dts: rk3366: add node of GPU.
authorchenzhen <chenzhen@rock-chips.com>
Tue, 1 Mar 2016 02:39:45 +0000 (10:39 +0800)
committerchenzhen <chenzhen@rock-chips.com>
Wed, 9 Mar 2016 07:50:45 +0000 (15:50 +0800)
Change-Id: Id545de4b7a2747e6b2c46cbedfdc160c3552c105
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3366-tb.dts
arch/arm64/boot/dts/rockchip/rk3366.dtsi

index f5cd5f7c81cf5a209b45ecb7a0ea2d2e6acc8a73..71701910901066712943ca3b0f2d31ab88633533 100644 (file)
 
 &cpu0 {
        cpu-supply = <&syr827>;
-};
\ No newline at end of file
+};
+
+&gpu {
+       mali-supply = <&vdd_logic>;
+       status = "okay";
+};
index 4264dcdc50156fb04090f179f874c1379cdb9431..5e95e4187db41242de8e1c4075ba5352eb92ce8a 100644 (file)
                        };
                };
        };
+
+       gpu: gpu@ffa30000 {
+               compatible = "arm,malit764",
+                            "arm,malit76x",
+                            "arm,malit7xx",
+                            "arm,mali-midgard";
+
+               reg = <0x0 0xffa30000 0 0x10000>;
+
+               interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "GPU", "MMU", "JOB";
+
+               clocks = <&cru ACLK_GPU>;
+               clock-names = "clk_mali";
+
+               operating-points = <
+                       /* KHz    uV */
+                       500000 1150000
+                       420000 1050000
+                       300000 950000
+                       200000 900000
+                       100000 900000 >;
+               status = "disabled";
+       };
 };