MIPS: Use copy_s.fmt rather than copy_u.fmt

commit 8a3c8b48aca8771bff3536e40aa26ffb311699d1 upstream.

In revision 1.12 of the MSA specification, the copy_u.w instruction has
been removed for MIPS32 & the copy_u.d instruction has been removed for
MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
complain about this like so:

arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'

Since we always copy to the width of a GPR, simply use copy_s instead of
copy_u to fix this.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13061/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 867f924b05c79522a2d397d0002bc8a1397319e2..b99b38862fcb6fb44e7bfbfb44daa823313efe3c 100644 (file)
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -298,21 +298,21 @@
        .set    pop
        .endm
 
-       .macro  copy_u_w        ws, n
+       .macro  copy_s_w        ws, n
        .set    push
        .set    mips32r2
        .set    fp=64
        .set    msa
-       copy_u.w $1, $w\ws[\n]
+       copy_s.w $1, $w\ws[\n]
        .set    pop
        .endm
 
-       .macro  copy_u_d        ws, n
+       .macro  copy_s_d        ws, n
        .set    push
        .set    mips64r2
        .set    fp=64
        .set    msa
-       copy_u.d $1, $w\ws[\n]
+       copy_s.d $1, $w\ws[\n]
        .set    pop
        .endm
 
@@ -346,8 +346,8 @@
 #define STH_MSA_INSN           0x5800081f
 #define STW_MSA_INSN           0x5800082f
 #define STD_MSA_INSN           0x5800083f
-#define COPY_UW_MSA_INSN       0x58f00056
-#define COPY_UD_MSA_INSN       0x58f80056
+#define COPY_SW_MSA_INSN       0x58b00056
+#define COPY_SD_MSA_INSN       0x58b80056
 #define INSERT_W_MSA_INSN      0x59300816
 #define INSERT_D_MSA_INSN      0x59380816
 #else
@@ -361,8 +361,8 @@
 #define STH_MSA_INSN           0x78000825
 #define STW_MSA_INSN           0x78000826
 #define STD_MSA_INSN           0x78000827
-#define COPY_UW_MSA_INSN       0x78f00059
-#define COPY_UD_MSA_INSN       0x78f80059
+#define COPY_SW_MSA_INSN       0x78b00059
+#define COPY_SD_MSA_INSN       0x78b80059
 #define INSERT_W_MSA_INSN      0x79300819
 #define INSERT_D_MSA_INSN      0x79380819
 #endif
@@ -461,21 +461,21 @@
        .set    pop
        .endm
 
-       .macro  copy_u_w        ws, n
+       .macro  copy_s_w        ws, n
        .set    push
        .set    noat
        SET_HARDFLOAT
        .insn
-       .word   COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
+       .word   COPY_SW_MSA_INSN | (\n << 16) | (\ws << 11)
        .set    pop
        .endm
 
-       .macro  copy_u_d        ws, n
+       .macro  copy_s_d        ws, n
        .set    push
        .set    noat
        SET_HARDFLOAT
        .insn
-       .word   COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
+       .word   COPY_SD_MSA_INSN | (\n << 16) | (\ws << 11)
        .set    pop
        .endm
 

diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index f09546ee2cdc907dc02e4c391c103ba381e35a5e..bc74485ec80591cf9891418463134dddc876d118 100644 (file)
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -244,17 +244,17 @@ LEAF(\name)
        .set    push
        .set    noat
 #ifdef CONFIG_64BIT
-       copy_u_d \wr, 1
+       copy_s_d \wr, 1
        EX sd   $1, \off(\base)
 #elif defined(CONFIG_CPU_LITTLE_ENDIAN)
-       copy_u_w \wr, 2
+       copy_s_w \wr, 2
        EX sw   $1, \off(\base)
-       copy_u_w \wr, 3
+       copy_s_w \wr, 3
        EX sw   $1, (\off+4)(\base)
 #else /* CONFIG_CPU_BIG_ENDIAN */
-       copy_u_w \wr, 2
+       copy_s_w \wr, 2
        EX sw   $1, (\off+4)(\base)
-       copy_u_w \wr, 3
+       copy_s_w \wr, 3
        EX sw   $1, \off(\base)
 #endif
        .set    pop