ARM64: dts: rk3399: enable rockchip-suspend for box

Change-Id: Ibfaee3b898dc77673b806e6a46570320918b9a5e
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box-next.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-box-next.dtsi
index 060172fdfe167f2e73cecbbf9eaaae32e85c0ba0..bdb95ac3914a311ae9b82c45b2fa271679698e65 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box-next.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box-next.dtsi
@@ -838,3 +838,32 @@
 &rkvdec {
        status = "okay";
 };
+
+&rockchip_suspend {
+       status = "okay";
+       rockchip,sleep-debug-en = <0>;
+       rockchip,sleep-mode-config = <
+               (0
+               | RKPM_SLP_ARMPD
+               | RKPM_SLP_PERILPPD
+               | RKPM_SLP_DDR_RET
+               | RKPM_SLP_PLLPD
+               | RKPM_SLP_CENTER_PD
+               | RKPM_SLP_AP_PWROFF
+               )
+       >;
+       rockchip,wakeup-config = <
+               (0
+               | RKPM_GPIO_WKUP_EN
+               | RKPM_PWM_WKUP_EN
+               )
+       >;
+       rockchip,pwm-regulator-config = <
+               (0
+               | PWM2_REGULATOR_EN
+               )
+       >;
+       rockchip,power-ctrl =
+               <&gpio1 17 GPIO_ACTIVE_HIGH>,
+               <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
index 9ac533c2e5bf8c35c33e6528366145da6415160e..fc57e736fe7b61c3cc11a25e92f7cf3842e2d25c 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
@@ -227,3 +227,9 @@
        vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
        fcs,suspend-voltage-selector = <0>;
 };
+
+&rockchip_suspend {
+       rockchip,power-ctrl =
+               <&gpio1 18 GPIO_ACTIVE_LOW>,
+               <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-next.dts b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-next.dts
index 03f2b5c220ad74c2c6241816db24d325be9b980d..5f4c4c984d97e8a4270a5ba5411a96527739103d 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-next.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2-next.dts
@@ -144,3 +144,9 @@
        vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
        fcs,suspend-voltage-selector = <0>;
 };
+
+&rockchip_suspend {
+       rockchip,power-ctrl =
+               <&gpio1 18 GPIO_ACTIVE_LOW>,
+               <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2.dts b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2.dts
index ce8843ffaf7e3e23eabf0395b3529234b60b7341..b8e0f821183d0b277d1fe471441bd4727091c92c 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box-rev2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box-rev2.dts
@@ -131,3 +131,9 @@
        vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
        fcs,suspend-voltage-selector = <0>;
 };
+
+&rockchip_suspend {
+       rockchip,power-ctrl =
+               <&gpio1 18 GPIO_ACTIVE_LOW>,
+               <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
index 1102d38b0c09ac18d72eeaf8e9e893334be98b06..685a32629c21c86d99fe1c55b8f255bcb555c115 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
@@ -871,3 +871,31 @@
        pmu1830-supply = <&vcc_1v8>;
 };
 
+&rockchip_suspend {
+       status = "okay";
+       rockchip,sleep-debug-en = <0>;
+       rockchip,sleep-mode-config = <
+               (0
+               | RKPM_SLP_ARMPD
+               | RKPM_SLP_PERILPPD
+               | RKPM_SLP_DDR_RET
+               | RKPM_SLP_PLLPD
+               | RKPM_SLP_CENTER_PD
+               | RKPM_SLP_AP_PWROFF
+               )
+       >;
+       rockchip,wakeup-config = <
+               (0
+               | RKPM_GPIO_WKUP_EN
+               | RKPM_PWM_WKUP_EN
+               )
+       >;
+       rockchip,pwm-regulator-config = <
+               (0
+               | PWM2_REGULATOR_EN
+               )
+       >;
+       rockchip,power-ctrl =
+               <&gpio1 17 GPIO_ACTIVE_HIGH>,
+               <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};