ARM64: dts: rk3399: add support for evb3
authorJianqun Xu <jay.xu@rock-chips.com>
Thu, 7 Jul 2016 07:35:11 +0000 (15:35 +0800)
committerJianqun Xu <jay.xu@rock-chips.com>
Fri, 22 Jul 2016 06:28:21 +0000 (14:28 +0800)
Add to support RK3399 evb reversion 3, with ES2.

Change-Id: Ia07a19d600a6acc1e503e9e56c78d2f60f4ef9be
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-evb-rev3.dtsi [new file with mode: 0644]

index 97d07a091fd7dc2aa25e22ac5f0928e2f5be82f4..064aba3966e1c01991849eb8f3cec74909ead56c 100644 (file)
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev1-cros.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-android-next.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-cros.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-android-next.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev2-cros.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev3-android.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-fpga.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-gru.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r0.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-fpga.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-gru.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r0.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3-android.dts
new file mode 100644 (file)
index 0000000..6005f9b
--- /dev/null
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3399-evb-rev3.dtsi"
+#include "rk3399-android.dtsi"
+
+/ {
+       model = "Rockchip RK3399 Evaluation Board v3 (Android)";
+       compatible = "rockchip,android", "rockchip,rk3399-evb-rev3", "rockchip,rk3399";
+};
+
+&vdd_center {
+       rockchip,pwm_id= <3>;
+       rockchip,pwm_voltage = <900000>;
+};
+
+&rk_screen {
+       #include <dt-bindings/display/screen-timing/lcd-tv080wum-nl0-mipi.dtsi>
+};
+
+&vopb_rk_fb {
+       status = "okay";
+       power_ctr: power_ctr {
+               rockchip,debug = <0>;
+               lcd_en: lcd-en {
+                       rockchip,power_type = <GPIO>;
+                       gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+                       rockchip,delay = <10>;
+               };
+
+               /*lcd_cs: lcd-cs {
+                       rockchip,power_type = <GPIO>;
+                       gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;//GPIO_C5 = 21
+                       rockchip,delay = <10>;
+               };*/
+
+               /*lcd_rst: lcd-rst {
+                       rockchip,power_type = <GPIO>;
+                       gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
+                       rockchip,delay = <5>;
+               };*/
+       };
+};
+
+&vopl_rk_fb {
+       status = "okay";
+};
+
+&mipi0_rk_fb {
+       status = "okay";
+};
+
+&hdmi_rk_fb {
+       status = "okay";
+       rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
+};
+
+&i2s2 {
+       status = "okay";
+};
+
+&dw_hdmi_audio {
+       status = "okay";
+};
+
+&hdmi_sound {
+       status = "okay";
+};
+
+&spdif {
+       status = "okay";
+};
+
+&spdif_out {
+       status = "okay";
+};
+
+&spdif_sound {
+       status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-evb-rev3.dtsi
new file mode 100644 (file)
index 0000000..8c4874c
--- /dev/null
@@ -0,0 +1,451 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "rk3399-evb.dtsi"
+
+/ {
+       compatible = "rockchip,rk3399-evb-rev3", "rockchip,rk3399";
+
+       vcc5v0_sys: vcc5v0-sys {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0_sys";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+};
+
+&cluster0_opp {
+       opp@408000000 {
+               opp-hz = /bits/ 64 <408000000>;
+               opp-microvolt = <800000>;
+               clock-latency-ns = <40000>;
+       };
+       opp@600000000 {
+               opp-hz = /bits/ 64 <600000000>;
+               opp-microvolt = <800000>;
+       };
+       opp@816000000 {
+               opp-hz = /bits/ 64 <816000000>;
+               opp-microvolt = <800000>;
+       };
+       opp@1008000000 {
+               opp-hz = /bits/ 64 <1008000000>;
+               opp-microvolt = <875000>;
+       };
+       opp@1200000000 {
+               opp-hz = /bits/ 64 <1200000000>;
+               opp-microvolt = <925000>;
+       };
+       opp@1416000000 {
+               opp-hz = /bits/ 64 <1416000000>;
+               opp-microvolt = <1050000>;
+       };
+       opp@1512000000 {
+               opp-hz = /bits/ 64 <1512000000>;
+               opp-microvolt = <1075000>;
+       };
+};
+
+&cluster1_opp {
+       opp@408000000 {
+               opp-hz = /bits/ 64 <408000000>;
+               opp-microvolt = <800000>;
+               clock-latency-ns = <40000>;
+       };
+       opp@600000000 {
+               opp-hz = /bits/ 64 <600000000>;
+               opp-microvolt = <800000>;
+       };
+       opp@816000000 {
+               opp-hz = /bits/ 64 <816000000>;
+               opp-microvolt = <825000>;
+       };
+       opp@1008000000 {
+               opp-hz = /bits/ 64 <1008000000>;
+               opp-microvolt = <875000>;
+       };
+       opp@1200000000 {
+               opp-hz = /bits/ 64 <1200000000>;
+               opp-microvolt = <950000>;
+       };
+       opp@1416000000 {
+               opp-hz = /bits/ 64 <1416000000>;
+               opp-microvolt = <1025000>;
+       };
+       opp@1608000000 {
+               opp-hz = /bits/ 64 <1608000000>;
+               opp-microvolt = <1100000>;
+       };
+       opp@1800000000 {
+               opp-hz = /bits/ 64 <1800000000>;
+               opp-microvolt = <1175000>;
+       };
+       opp@1992000000 {
+               opp-hz = /bits/ 64 <1992000000>;
+               opp-microvolt = <1250000>;
+       };
+};
+
+&CPU_COST_A72 {
+       busy-cost-data = <
+               210   129       /*  408MHz */
+               308   184       /*  600MHz */
+               419   246       /*  816MHz */
+               518   335       /* 1008MHz */
+               617   428       /* 1200MHz */
+               728   573       /* 1416MHz */
+               827   724       /* 1608MHz */
+               925   900       /* 1800MHz */
+               1024  1108      /* 1992MHz */
+       >;
+       idle-cost-data = <
+             15
+             15
+              0
+       >;
+};
+
+&CPU_COST_A53 {
+       busy-cost-data = <
+               108    46       /*  408M */
+               159    67       /*  600M */
+               216    90       /*  816M */
+               267    120      /* 1008M */
+               318    153      /* 1200M */
+               375    198      /* 1416M */
+               401    222      /* 1512M */
+       >;
+       idle-cost-data = <
+             6
+             6
+             0
+       >;
+};
+
+&CLUSTER_COST_A72 {
+       busy-cost-data = <
+               210   129       /*  408MHz */
+               308   184       /*  600MHz */
+               419   246       /*  816MHz */
+               518   335       /* 1008MHz */
+               617   428       /* 1200MHz */
+               728   573       /* 1416MHz */
+               827   724       /* 1608MHz */
+               925   900       /* 1800MHz */
+               1024  1108      /* 1992MHz */
+       >;
+       idle-cost-data = <
+                65
+                65
+                65
+       >;
+};
+
+&CLUSTER_COST_A53 {
+       busy-cost-data = <
+               108    46       /*  408M */
+               159    67       /*  600M */
+               216    90       /*  816M */
+               267    120      /* 1008M */
+               318    153      /* 1200M */
+               375    198      /* 1416M */
+               401    222      /* 1512M */
+       >;
+       idle-cost-data = <
+               56
+               56
+               56
+       >;
+};
+
+&gpu_opp_table {
+       opp@200000000 {
+               opp-hz = /bits/ 64 <200000000>;
+               opp-microvolt = <900000>;
+       };
+       opp@300000000 {
+               opp-hz = /bits/ 64 <300000000>;
+               opp-microvolt = <900000>;
+       };
+       opp@400000000 {
+               opp-hz = /bits/ 64 <400000000>;
+               opp-microvolt = <900000>;
+       };
+       opp@500000000 {
+               opp-hz = /bits/ 64 <500000000>;
+               opp-microvolt = <900000>;
+       };
+       opp@600000000 {
+               opp-hz = /bits/ 64 <600000000>;
+               opp-microvolt = <900000>;
+       };
+       opp@700000000 {
+               opp-hz = /bits/ 64 <700000000>;
+               opp-microvolt = <925000>;
+       };
+       opp@800000000 {
+               opp-hz = /bits/ 64 <800000000>;
+               opp-microvolt = <950000>;
+       };
+};
+
+&i2c0 {
+       vdd_cpu_b: syr827@40 {
+               compatible = "silergy,syr827";
+               reg = <0x40>;
+               vin-supply = <&vcc5v0_sys>;
+               regulator-compatible = "fan53555-reg";
+               regulator-name = "vdd_cpu_b";
+               regulator-min-microvolt = <712500>;
+               regulator-max-microvolt = <1500000>;
+               regulator-ramp-delay = <1000>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-initial-state = <3>;
+                       regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+
+       vdd_gpu: syr828@41 {
+               compatible = "silergy,syr828";
+               reg = <0x41>;
+               vin-supply = <&vcc5v0_sys>;
+               regulator-compatible = "fan53555-reg";
+               regulator-name = "vdd_gpu";
+               regulator-min-microvolt = <712500>;
+               regulator-max-microvolt = <1500000>;
+               regulator-ramp-delay = <1000>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-initial-state = <3>;
+                       regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+
+       rk808: pmic@1b {
+               compatible = "rockchip,rk808";
+               reg = <0x1b>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
+               rockchip,system-power-controller;
+               wakeup-source;
+               #clock-cells = <1>;
+               clock-output-names = "xin32k", "rk808-clkout2";
+
+               vcc1-supply = <&vcc3v3_sys>;
+               vcc2-supply = <&vcc3v3_sys>;
+               vcc3-supply = <&vcc3v3_sys>;
+               vcc4-supply = <&vcc3v3_sys>;
+               vcc6-supply = <&vcc3v3_sys>;
+               vcc7-supply = <&vcc3v3_sys>;
+               vcc8-supply = <&vcc3v3_sys>;
+               vcc9-supply = <&vcc3v3_sys>;
+               vcc10-supply = <&vcc3v3_sys>;
+               vcc11-supply = <&vcc3v3_sys>;
+               vcc12-supply = <&vcc3v3_sys>;
+               vddio-supply = <&vcc1v8_pmu>;
+
+               regulators {
+                       vdd_log: DCDC_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-name = "vdd_log";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <900000>;
+                               };
+                       };
+
+                       vdd_cpu_l: DCDC_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-name = "vdd_cpu_l";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_ddr: DCDC_REG3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc_ddr";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                               };
+                       };
+
+                       vcc_1v8: DCDC_REG4 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc_1v8";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <1800000>;
+                               };
+                       };
+
+                       vcc1v8_dvp: LDO_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc1v8_dvp";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc3v0_tp: LDO_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-name = "vcc3v0_tp";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc1v8_pmu: LDO_REG3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc1v8_pmu";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <1800000>;
+                               };
+                       };
+
+                       vcc_sd: LDO_REG4 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vcc_sd";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <3300000>;
+                               };
+                       };
+
+                       vcca3v0_codec: LDO_REG5 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-name = "vcca3v0_codec";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_1v5: LDO_REG6 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1500000>;
+                               regulator-max-microvolt = <1500000>;
+                               regulator-name = "vcc_1v5";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <1500000>;
+                               };
+                       };
+
+                       vcca1v8_codec: LDO_REG7 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcca1v8_codec";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_3v0: LDO_REG8 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-name = "vcc_3v0";
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <3000000>;
+                               };
+                       };
+
+                       vcc3v3_s3: SWITCH_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc3v3_s3";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc3v3_s0: SWITCH_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc3v3_s0";
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+               };
+       };
+};