clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
authorHeiko Stübner <heiko@sntech.de>
Fri, 23 May 2014 20:58:53 +0000 (22:58 +0200)
committerOlof Johansson <olof@lixom.net>
Mon, 26 May 2014 19:09:45 +0000 (12:09 -0700)
The originally used PNAME macro from the core samsung clock infrastructure
declares the created array as initdata, creating section mismatch warnings
in the dclk driver.

Thus declare them directly, removing these warning.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
drivers/clk/samsung/clk-s3c2410-dclk.c

index 8d8dff005c10768f3fa88205977833eda096dd8d..c1726f46eddd986b523a9c7a171458aa990b0c7e 100644 (file)
@@ -135,26 +135,26 @@ struct s3c24xx_dclk {
 #define to_s3c24xx_dclk1(x) \
                container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb)
 
-PNAME(dclk_s3c2410_p) = { "pclk", "uclk" };
-PNAME(clkout0_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk",
+static const char *dclk_s3c2410_p[] = { "pclk", "uclk" };
+static const char *clkout0_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
                             "gate_dclk0" };
-PNAME(clkout1_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk",
+static const char *clkout1_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
                             "gate_dclk1" };
 
-PNAME(clkout0_s3c2412_p) = { "mpll", "upll", "rtc_clkout",
+static const char *clkout0_s3c2412_p[] = { "mpll", "upll", "rtc_clkout",
                             "hclk", "pclk", "gate_dclk0" };
-PNAME(clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk",
+static const char *clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk",
                             "gate_dclk1" };
 
-PNAME(clkout0_s3c2440_p) = { "xti", "upll", "fclk", "hclk", "pclk",
+static const char *clkout0_s3c2440_p[] = { "xti", "upll", "fclk", "hclk", "pclk",
                             "gate_dclk0" };
-PNAME(clkout1_s3c2440_p) = { "mpll", "upll", "rtc_clkout",
+static const char *clkout1_s3c2440_p[] = { "mpll", "upll", "rtc_clkout",
                             "hclk", "pclk", "gate_dclk1" };
 
-PNAME(dclk_s3c2443_p) = { "pclk", "epll" };
-PNAME(clkout0_s3c2443_p) = { "xti", "epll", "armclk", "hclk", "pclk",
+static const char *dclk_s3c2443_p[] = { "pclk", "epll" };
+static const char *clkout0_s3c2443_p[] = { "xti", "epll", "armclk", "hclk", "pclk",
                             "gate_dclk0" };
-PNAME(clkout1_s3c2443_p) = { "dummy", "epll", "rtc_clkout",
+static const char *clkout1_s3c2443_p[] = { "dummy", "epll", "rtc_clkout",
                             "hclk", "pclk", "gate_dclk1" };
 
 #define DCLKCON_DCLK_DIV_MASK          0xf