arm: at91: dt: at91sam9 add pinctrl support
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Thu, 5 Jul 2012 08:56:09 +0000 (16:56 +0800)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Sat, 13 Oct 2012 01:21:43 +0000 (09:21 +0800)
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
12 files changed:
arch/arm/boot/dts/at91sam9260.dtsi
arch/arm/boot/dts/at91sam9263.dtsi
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9n12.dtsi
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/configs/at91_dt_defconfig
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9n12.c
arch/arm/mach-at91/at91sam9x5.c
arch/arm/mach-at91/setup.c

index 425da936051d43416e005a29f3bd9708c9f3873c..0b72ae3d8250994861e0602a689246040e669325 100644 (file)
                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
                                ranges = <0xfffff400 0xfffff400 0x600>;
 
+                               atmel,mux-mask = <
+                                     /*    A         B     */
+                                      0xffffffff 0xffc00c3b  /* pioA */
+                                      0xffffffff 0x7fff3ccf  /* pioB */
+                                      0xffffffff 0x007fffff  /* pioC */
+                                     >;
+
+                               /* shared pinctrl settings */
+
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
index 5b619c9255bd4b251332e1e8ef76c1755fad2edf..c8028fc9ec8321452132ce5875ebe8f6004fe928 100644 (file)
                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
                                ranges = <0xfffff200 0xfffff200 0xa00>;
 
+                               atmel,mux-mask = <
+                                     /*    A         B     */
+                                      0xfffffffb 0xffffe07f  /* pioA */
+                                      0x0007ffff 0x39072fff  /* pioB */
+                                      0xffffffff 0x3ffffff8  /* pioC */
+                                      0xfffffbff 0xffffffff  /* pioD */
+                                      0xffe00fff 0xfbfcff00  /* pioE */
+                                     >;
+
+                               /* shared pinctrl settings */
+
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                               };
                        };
 
                        dbgu: serial@ffffee00 {
index f2b0f93c0499567b5e71b1d255f3eef2e2b69d0f..5222625b6ce0c9bfb03e22c091fe41e3e8af87af 100644 (file)
                                compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
                                ranges = <0xfffff200 0xfffff200 0xa00>;
 
+                               atmel,mux-mask = <
+                                     /*    A         B     */
+                                      0xffffffff 0xffc003ff  /* pioA */
+                                      0xffffffff 0x800f8f00  /* pioB */
+                                      0xffffffff 0x00000e00  /* pioC */
+                                      0xffffffff 0xff0c1381  /* pioD */
+                                      0xffffffff 0x81ffff81  /* pioE */
+                                     >;
+
+                               /* shared pinctrl settings */
+
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
index b061c06260254d68aad36cf62f1f400fa09b8dd9..8b5276499aaf663e87b34e21dd8a646d21d30234 100644 (file)
                        pinctrl@fffff400 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                               compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
                                ranges = <0xfffff400 0xfffff400 0x800>;
 
+                               atmel,mux-mask = <
+                                     /*    A         B          C     */
+                                      0xffffffff 0xffe07983 0x00000000  /* pioA */
+                                      0x00040000 0x00047e0f 0x00000000  /* pioB */
+                                      0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
+                                      0x003fffff 0x003f8000 0x00000000  /* pioD */
+                                     >;
+
+                               /* shared pinctrl settings */
+
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
index 065698ac4debc32f15823b016484a4f11b712479..34d4d5c8c58d0f26012a59e5c64fa9d7b4b9e63a 100644 (file)
                        pinctrl@fffff200 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                               compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
                                ranges = <0xfffff400 0xfffff400 0x800>;
 
+                               atmel,mux-mask = <
+                                     /*    A         B          C     */
+                                      0xffffffff 0xffe0399f 0xc000001c  /* pioA */
+                                      0xffffffff 0xffc003ff 0xffc003ff  /* pioB */
+                                      0xffffffff 0xffc003ff 0xffc003ff  /* pioC */
+                                      0xffffffff 0xffc003ff 0xffc003ff  /* pioD */
+                                     >;
+
+                               /* shared pinctrl settings */
+
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
index 67bc571ed0c37c331a179703866ba861b1cdd2c1..b175577d7abb5aec9541461e35407f0f9059c04a 100644 (file)
@@ -111,6 +111,7 @@ CONFIG_I2C=y
 CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
+CONFIG_PINCTRL_AT91=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_AT91SAM9X_WATCHDOG=y
index 1dc40620ccfa44e1c7d9e06d0b8283a1e4272651..46d30831c9a8c667b47036a4d1153b8a1b0e4ef5 100644 (file)
@@ -235,6 +235,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_ID("pioA", &pioA_clk),
        CLKDEV_CON_ID("pioB", &pioB_clk),
        CLKDEV_CON_ID("pioC", &pioC_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
index 03cac586e36fbad1f206f2878023d63c8912514b..f8ea0013623487afcecf67408713da575c0415f1 100644 (file)
@@ -212,6 +212,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
        CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
index 32504b9eed9dca35205709029885a62cb9a2ab12..e6dd371d9f56da47689c4a4bb54a435729b517e6 100644 (file)
@@ -260,6 +260,12 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
+
        CLKDEV_CON_ID("pioA", &pioA_clk),
        CLKDEV_CON_ID("pioB", &pioB_clk),
        CLKDEV_CON_ID("pioC", &pioC_clk),
index 3905465f3abf50a5a33ebea442f43a5460cd72af..bf8a083a02abdeecf3e2e4a575a496fe20759f89 100644 (file)
@@ -171,10 +171,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
-       CLKDEV_CON_ID("pioA", &pioAB_clk),
-       CLKDEV_CON_ID("pioB", &pioAB_clk),
-       CLKDEV_CON_ID("pioC", &pioCD_clk),
-       CLKDEV_CON_ID("pioD", &pioCD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
        /* additional fake clock for macb_hclk */
        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
        CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
@@ -223,9 +223,6 @@ static void __init at91sam9n12_map_io(void)
 void __init at91sam9n12_initialize(void)
 {
        at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
-
-       /* Register GPIO subsystem (using DT) */
-       at91_gpio_init(NULL, 0);
 }
 
 AT91_SOC_START(sam9n12)
index f31d3a065d56bfffc2cb2837d42c3aec404b9e9d..56d13a4950a778f17c2d00a742c68edf02056a17 100644 (file)
@@ -234,10 +234,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
-       CLKDEV_CON_ID("pioA", &pioAB_clk),
-       CLKDEV_CON_ID("pioB", &pioAB_clk),
-       CLKDEV_CON_ID("pioC", &pioCD_clk),
-       CLKDEV_CON_ID("pioD", &pioCD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
+       CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
        /* additional fake clock for macb_hclk */
        CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
        CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
@@ -313,12 +313,6 @@ static void __init at91sam9x5_map_io(void)
        at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
 }
 
-void __init at91sam9x5_initialize(void)
-{
-       /* Register GPIO subsystem (using DT) */
-       at91_gpio_init(NULL, 0);
-}
-
 /* --------------------------------------------------------------------
  *  Interrupt initialization
  * -------------------------------------------------------------------- */
@@ -326,5 +320,4 @@ void __init at91sam9x5_initialize(void)
 AT91_SOC_START(sam9x5)
        .map_io = at91sam9x5_map_io,
        .register_clocks = at91sam9x5_register_clocks,
-       .init = at91sam9x5_initialize,
 AT91_SOC_END
index e228d7377b6184412af3cf65545e4c97d77945b4..523daa92be10b4424dfd1a62d225d93decf0709a 100644 (file)
@@ -449,7 +449,8 @@ void __init at91_dt_initialize(void)
        /* Register the processor-specific clocks */
        at91_boot_soc.register_clocks();
 
-       at91_boot_soc.init();
+       if (at91_boot_soc.init)
+               at91_boot_soc.init();
 }
 #endif