UPSTREAM: mmc: dw_mmc: change the DW_MCI_FREQ_MIN from 400K to 100K
authorJaehoon Chung <jh80.chung@samsung.com>
Thu, 17 Nov 2016 07:40:35 +0000 (16:40 +0900)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 3 Mar 2017 10:39:57 +0000 (18:39 +0800)
If there is no property "clock-freq-min-max", mmc->f_min should be set
to 400K by default. But Some SoC can be used 100K.
When 100K is used, MMC core will try to check from 400K to 100K.

Change-Id: I059c994f1654c212bcff9b85dbffd9697d800eaf
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 72e83577bc5bc02a92c7fd47d108de11c04dcbf0)

drivers/mmc/host/dw_mmc.c

index 3f5ece5f9cc29da24809e9075e79c37fe88c7c06..11ad6297eebd6430caa663272ac82285dce90801 100644 (file)
@@ -54,7 +54,7 @@
 #define DW_MCI_DMA_THRESHOLD   16
 
 #define DW_MCI_FREQ_MAX        200000000       /* unit: HZ */
-#define DW_MCI_FREQ_MIN        400000          /* unit: HZ */
+#define DW_MCI_FREQ_MIN        100000          /* unit: HZ */
 
 #define IDMAC_INT_CLR          (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
                                 SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \