rk3288: clk: slove make warning for clk-ops.c
authorzhangqing <zhangqing@rock-chips.com>
Thu, 16 Jul 2015 11:49:42 +0000 (04:49 -0700)
committerzhangqing <zhangqing@rock-chips.com>
Thu, 16 Jul 2015 11:49:42 +0000 (04:49 -0700)
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-ops.c

index a10c62ae924cbd42c90a40e83635274af0421060..7930a8cd9e3bf5daa95966cdf1228cb833b999bf 100644 (file)
@@ -644,9 +644,11 @@ static int clk_3288_dclk_lcdc0_set_rate(struct clk_hw *hw, unsigned long rate,
 
        /* set aclk_vio */
        if (parent_rate == __clk_get_rate(gpll)) {
+               parent = clk_get(NULL, "clk_gpll");
                clk_set_parent(aclk_vio0, gpll);
                clk_set_rate(aclk_vio0, 300*MHZ);
        } else {
+               parent = clk_get(NULL, "clk_cpll");
                clk_set_parent(aclk_vio0, cpll);
                clk_set_rate(aclk_vio0, __clk_get_rate(cpll));
        }
@@ -714,9 +716,11 @@ static int clk_3288_dclk_lcdc1_set_rate(struct clk_hw *hw, unsigned long rate,
 
        /* set aclk_vio */
        if (parent_rate == __clk_get_rate(gpll)) {
+               parent = clk_get(NULL, "clk_gpll");
                clk_set_parent(aclk_vio1, gpll);
                clk_set_rate(aclk_vio1, 300*MHZ);
        } else {
+               parent = clk_get(NULL, "clk_cpll");
                clk_set_parent(aclk_vio1, cpll);
                clk_set_rate(aclk_vio1, __clk_get_rate(cpll));
        }