arm64: rockchip: rk3368 support boot from little core

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index 2c7874fa83c37eff1a45979c5de95774b0cf0185..a36abc17cf99b7bc9c5f29ef2fd1021615634997 100755 (executable)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -37,49 +37,49 @@
                #address-cells = <2>;
                #size-cells = <0>;
 
-               big0: cpu@100 {
+               little0: cpu@100 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                };
-               big1: cpu@101 {
+               little1: cpu@101 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x101>;
                        enable-method = "psci";
                };
-               big2: cpu@102 {
+               little2: cpu@102 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x102>;
                        enable-method = "psci";
                };
-               big3: cpu@103 {
+               little3: cpu@103 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x103>;
                        enable-method = "psci";
                };
-               little0: cpu@0 {
+               big0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                };
-               little1: cpu@1 {
+               big1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                };
-               little2: cpu@2 {
+               big2: cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x2>;
                        enable-method = "psci";
                };
-               little3: cpu@3 {
+               big3: cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x3>;

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 03869fe577721b1493bf4b04add2e5483044f279..4232cf73585bcaac5b54b18fe1f0a957e6a17c87 100644 (file)
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -36,6 +36,8 @@ CONFIG_SMP=y
 CONFIG_SCHED_MC=y
 CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE=y
 CONFIG_SCHED_HMP=y
+CONFIG_HMP_FAST_CPU_MASK="4-7"
+CONFIG_HMP_SLOW_CPU_MASK="0-3"
 CONFIG_HMP_VARIABLE_SCALE=y
 CONFIG_HMP_FREQUENCY_INVARIANT_SCALE=y
 CONFIG_SCHED_HMP_LITTLE_PACKING=y

diff --git a/drivers/cpufreq/rockchip_big_little.c b/drivers/cpufreq/rockchip_big_little.c
index de82b1ac250c3161c424db3f974599406335dd49..41ac370f706f01c244437dbc001bea3dedab3242 100644 (file)
--- a/drivers/cpufreq/rockchip_big_little.c
+++ b/drivers/cpufreq/rockchip_big_little.c
@@ -252,13 +252,8 @@ static int cpufreq_bl_init_cpu0(struct cpufreq_policy *policy)
        if (clk_ddr_dvfs_node)
                clk_enable_dvfs(clk_ddr_dvfs_node);
 
-       if (big_little == 1) {
-               cluster_cpus_freq_dvfs_init(0, "clk_core_b");
-               cluster_cpus_freq_dvfs_init(1, "clk_core_l");
-       } else {
-               cluster_cpus_freq_dvfs_init(0, "clk_core_l");
-               cluster_cpus_freq_dvfs_init(1, "clk_core_b");
-       }
+       cluster_cpus_freq_dvfs_init(0, "clk_core_b");
+       cluster_cpus_freq_dvfs_init(1, "clk_core_l");
 
        cpufreq_register_notifier(&notifier_policy_block,
                                  CPUFREQ_POLICY_NOTIFIER);