arm64: rockchip: rk3368: cpu0 use rockchip timer

prepare for power off all cpu when idle

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index bfa3c0d094f6c331aab5b74c465181e871ff5378..cf76ca3778f9ef928dfb0d950cd7ace5eb452712 100644 (file)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -304,6 +304,13 @@
                rockchip,broadcast = <1>;
        };
 
+       timer@ff810020 {
+               compatible = "rockchip,timer";
+               reg = <0x0 0xff810020 0x0 0x20>;
+               interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+               rockchip,percpu = <0>;
+       };
+
        sram: sram@ff8c0000 {
                compatible = "mmio-sram";
                reg = <0x0 0xff8c0000 0x0 0xf000>; /* 60K (reserved 4K for mailbox)*/
@@ -641,7 +648,6 @@
                        <&clk_gates12 9>,/*hclk_rom*/
 
                        /*PD_ALIVE*/
-                       <&clk_gates22 13>,/*pclk_timer1*/
                        <&clk_gates22 12>,/*pclk_timer0*/
                        <&clk_gates22 9>,/*pclk_alive_niu*/
                        <&clk_gates22 8>,/*pclk_grf*/
@@ -661,6 +667,9 @@
                        <&clk_gates20 7>,/*hclk_peri_ahb_arbi*/
                        <&clk_gates19 1>,/*pclk_peri_axi_matrix*/
 
+                       <&clk_gates24 0>, /* g_clk_timer0 */
+                       <&clk_gates24 1>, /* g_clk_timer1 */
+
                        <&fclk_mcu>,
                        <&stclk_mcu>,
                        <&clk_gates7 0>;/*clk_jtag*/