CHROMIUM: [media] rk3288-vpu: Fix VP8 decode corruption

The QP value wasn't correctly clamped by calling function clamp()
with wrong order of arguments. Fix this by passing the arguments
correctly.

BUG=chrome-os-partner:35606
TEST=Open Chrome and navigate to:
http://video.webmfiles.org/elephants-dream.webm

Signed-off-by: ZhiChao Yu <zhichao.yu@rock-chips.com>
[tfiga: Moved back to clamp(), but fixed argument order.]
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/242171
Reviewed-by: Kuang-che Wu <kcwu@chromium.org>
Reviewed-by: Pawel Osciak <posciak@chromium.org>
Change-Id: I415e19e6cdfb125b281d205bcdf93ae9911655f4
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

diff --git a/drivers/media/platform/rk3288-vpu/rk3288_vpu_hw_vp8d.c b/drivers/media/platform/rk3288-vpu/rk3288_vpu_hw_vp8d.c
index ef9fd0cbb9291f55c9f2bec285f5a4b20b554981..60cdc7e12a3e58f1ba73574d0d873220c7db8d42 100644 (file)
--- a/drivers/media/platform/rk3288-vpu/rk3288_vpu_hw_vp8d.c
+++ b/drivers/media/platform/rk3288-vpu/rk3288_vpu_hw_vp8d.c
@@ -356,8 +356,8 @@ static void rk3288_vp8d_cfg_lf(struct rk3288_vpu_ctx *ctx)
                /* delta mode */
                for (i = 0; i < 4; i++)
                        vp8d_reg_write(vpu, &vp8d_lf_level[i],
-                                       clamp(0, 63, hdr->lf_hdr.level
-                                       + hdr->sgmnt_hdr.lf_update[i]));
+                                       clamp(hdr->lf_hdr.level
+                                       + hdr->sgmnt_hdr.lf_update[i], 0, 63));
        }
 
        reg = VDPU_REG_REF_PIC_FILT_SHARPNESS(hdr->lf_hdr.sharpness_level);
@@ -395,8 +395,9 @@ static void rk3288_vp8d_cfg_qp(struct rk3288_vpu_ctx *ctx)
                /* delta mode */
                for (i = 0; i < 4; i++)
                        vp8d_reg_write(vpu, &vp8d_quant[i],
-                                       clamp(0, 127, hdr->quant_hdr.y_ac_qi
-                                       + hdr->sgmnt_hdr.quant_update[i]));
+                                       clamp(hdr->quant_hdr.y_ac_qi
+                                       + hdr->sgmnt_hdr.quant_update[i],
+                                       0, 127));
        }
 
        vp8d_reg_write(vpu, &vp8d_quant_delta[0], hdr->quant_hdr.y_dc_delta);