rockchip: clk: rk3368: remove the flag ROCKCHIP_PLL_SYNC_RATE for CPLL

to slove the display shaking, when uboot logo display to kernel show.

Change-Id: I5856581fabd0171be09993878ffb4ef1af0fb204
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 89a9d0a78d6fe268c3be3213a1582916f5e04e70..d5263d5c2b4e10f05552995e7c9954c30f879734 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -144,7 +144,7 @@ static struct rockchip_pll_clock rk3368_pll_clks[] __initdata = {
        [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3368_PLL_CON(8),
                     RK3368_PLL_CON(11), 8, 2, 0, NULL),
        [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3368_PLL_CON(12),
-                    RK3368_PLL_CON(15), 8, 3, ROCKCHIP_PLL_SYNC_RATE, rk3368_pll_rates),
+                    RK3368_PLL_CON(15), 8, 3, 0, rk3368_pll_rates),
        [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
                     RK3368_PLL_CON(19), 8, 4, ROCKCHIP_PLL_SYNC_RATE, rk3368_pll_rates),
        [npll] = PLL(pll_rk3066, PLL_NPLL, "npll",  mux_pll_p, 0, RK3368_PLL_CON(20),