MIPS: DEC: Avoid la pseudo-instruction in delay slots

commit 3021773c7c3e75e20b693931a19362681e744ea9 upstream.

When expanding the la or dla pseudo-instruction in a delay slot the GNU
assembler will complain should the pseudo-instruction expand to multiple
actual instructions, since only the first of them will be in the delay
slot leading to the pseudo-instruction being only partially executed if
the branch is taken. Use of PTR_LA in the dec int-handler.S leads to
such warnings:

  arch/mips/dec/int-handler.S: Assembler messages:
  arch/mips/dec/int-handler.S:149: Warning: macro instruction expanded into multiple instructions in a branch delay slot
  arch/mips/dec/int-handler.S:198: Warning: macro instruction expanded into multiple instructions in a branch delay slot

Avoid this by open coding the PTR_LA macros.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 8c6f508e59de144837fc781aae73987e1fe6280f..554d1da97743d97122a7a81f1cbdf800a6d7f5a0 100644 (file)
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -146,7 +146,25 @@
                /*
                 * Find irq with highest priority
                 */
-                PTR_LA t1,cpu_mask_nr_tbl
+               # open coded PTR_LA t1, cpu_mask_nr_tbl
+#if (_MIPS_SZPTR == 32)
+               # open coded la t1, cpu_mask_nr_tbl
+               lui     t1, %hi(cpu_mask_nr_tbl)
+               addiu   t1, %lo(cpu_mask_nr_tbl)
+
+#endif
+#if (_MIPS_SZPTR == 64)
+               # open coded dla t1, cpu_mask_nr_tbl
+               .set    push
+               .set    noat
+               lui     t1, %highest(cpu_mask_nr_tbl)
+               lui     AT, %hi(cpu_mask_nr_tbl)
+               daddiu  t1, t1, %higher(cpu_mask_nr_tbl)
+               daddiu  AT, AT, %lo(cpu_mask_nr_tbl)
+               dsll    t1, 32
+               daddu   t1, t1, AT
+               .set    pop
+#endif
 1:             lw      t2,(t1)
                nop
                and     t2,t0
@@ -195,7 +213,25 @@
                /*
                 * Find irq with highest priority
                 */
-                PTR_LA t1,asic_mask_nr_tbl
+               # open coded PTR_LA t1,asic_mask_nr_tbl
+#if (_MIPS_SZPTR == 32)
+               # open coded la t1, asic_mask_nr_tbl
+               lui     t1, %hi(asic_mask_nr_tbl)
+               addiu   t1, %lo(asic_mask_nr_tbl)
+
+#endif
+#if (_MIPS_SZPTR == 64)
+               # open coded dla t1, asic_mask_nr_tbl
+               .set    push
+               .set    noat
+               lui     t1, %highest(asic_mask_nr_tbl)
+               lui     AT, %hi(asic_mask_nr_tbl)
+               daddiu  t1, t1, %higher(asic_mask_nr_tbl)
+               daddiu  AT, AT, %lo(asic_mask_nr_tbl)
+               dsll    t1, 32
+               daddu   t1, t1, AT
+               .set    pop
+#endif
 2:             lw      t2,(t1)
                nop
                and     t2,t0