drm/radeon/si_dpm: Limit clocks on HD86xx part
authorTom St Denis <tom.stdenis@amd.com>
Thu, 13 Oct 2016 16:38:07 +0000 (12:38 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 10 Nov 2016 15:36:35 +0000 (16:36 +0100)
commit fb9a5b0c1c9893db2e0d18544fd49e19d784a87d upstream.

Limit clocks on a specific HD86xx part to avoid
crashes (while awaiting an appropriate PP fix).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/radeon/si_dpm.c

index 472e0771832eef0ab248f664ccf16d3730fcc0e4..a6e20c37093d6c3006000e0c91ef921079bbd91b 100644 (file)
@@ -3021,6 +3021,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
                max_sclk = 75000;
                max_mclk = 80000;
        }
+       /* limit clocks on HD8600 series */
+       if (rdev->pdev->device == 0x6660 &&
+           rdev->pdev->revision == 0x83) {
+               max_sclk = 75000;
+               max_mclk = 80000;
+       }
 
        if (rps->vce_active) {
                rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;