ARM64: dts: rk3366: add iep device

add iep device

Change-Id: Ie3c60a79aaddf308847f84b3acd55d529e22f352
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
index 2b582d09d887d3fc081a7dd17e9f89a91c1269cd..68c7e5aa870f6ff626f5cd27e82f6dabe304f809 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
@@ -666,6 +666,10 @@
        status = "okay";
 };
 
+&iep {
+       status = "okay";
+};
+
 &vpu {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index 91a8d390e074af7f61af783de07a2a1385cdc0d0..b91de810c798de1e510432933a657a2658d8c93f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -713,6 +713,17 @@
                status = "disabled";
        };
 
+       iep: iep@ff900000 {
+               compatible = "rockchip,iep";
+               iommu_enabled = <1>;
+               reg = <0x0 0xff900000 0x0 0x800>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk_iep", "hclk_iep";
+               version = <2>;
+               status = "disabled";
+       };
+
        rga: rga@ff920000 {
                compatible = "rockchip,rga2";
                dev_mode = <1>;