rk3368: thermal: rockchip_thermal support rk3368

Signed-off-by: David Wu <wdc@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rk3368-tb_8846.dts b/arch/arm64/boot/dts/rk3368-tb_8846.dts
index 577c92ae7f73f3dd097a1c446dd2c1e2aba8b9f4..36bc3dda847aa2dbef58a25d1c66de1c8d50f086 100644 (file)
--- a/arch/arm64/boot/dts/rk3368-tb_8846.dts
+++ b/arch/arm64/boot/dts/rk3368-tb_8846.dts
@@ -384,6 +384,12 @@
        pinctrl-0 = <&uart0_xfer &uart0_cts>;
 };
 
+&tsadc {
+       tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+       //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
        syr827: syr827@40 {

diff --git a/arch/arm64/boot/dts/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rk3368-thermal.dtsi
new file mode 100644 (file)
index 0000000..6173295
--- /dev/null
+++ b/arch/arm64/boot/dts/rk3368-thermal.dtsi
@@ -0,0 +1,74 @@
+/*
+ * Device Tree Source for RK3288 SoC thermal
+ *
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+cpu_thermal: cpu_thermal {
+       polling-delay-passive = <1000>; /* milliseconds */
+       polling-delay = <5000>; /* milliseconds */
+
+                       /* sensor       ID */
+       thermal-sensors = <&tsadc       0>;
+       linux,hwmon;
+
+       trips {
+               cpu_alert0: cpu_alert0 {
+                       temperature = <80000>; /* millicelsius */
+                       hysteresis = <2000>; /* millicelsius */
+                       type = "passive";
+               };
+               cpu_crit: cpu_crit {
+                       temperature = <115000>; /* millicelsius */
+                       hysteresis = <2000>; /* millicelsius */
+                       type = "critical";
+               };
+       };
+/*
+       cooling-maps {
+               map0 {
+                       trip = <&cpu_alert0>;
+                       cooling-device =
+                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+       };
+*/
+};
+
+gpu_thermal: gpu_thermal {
+       polling-delay-passive = <1000>; /* milliseconds */
+       polling-delay = <5000>; /* milliseconds */
+
+                       /* sensor       ID */
+       thermal-sensors = <&tsadc       1>;
+       linux,hwmon;
+
+       trips {
+               gpu_alert0: gpu_alert0 {
+                       temperature = <80000>; /* millicelsius */
+                       hysteresis = <2000>; /* millicelsius */
+                       type = "passive";
+               };
+               gpu_crit: gpu_crit {
+                       temperature = <115000>; /* millicelsius */
+                       hysteresis = <2000>; /* millicelsius */
+                       type = "critical";
+               };
+       };
+
+/*
+       cooling-maps {
+               map0 {
+                       trip = <&gpu_alert0>;
+                       cooling-device =
+                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+       };
+*/
+};

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index 1f655d9308a77ca8fb955837af658136c89f7291..c36f9c16461efb4f923667507dec749ce803b07b 100755 (executable)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -1188,21 +1188,22 @@
                status = "okay";
        };
 
+       thermal-zones {
+               #include "rk3368-thermal.dtsi"
+       };
+
        tsadc: tsadc@ff280000 {
-               compatible = "rockchip,tsadc";
+               compatible = "rockchip,rk3368-tsadc";
                reg = <0x0 0xff280000 0x0 0x100>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-               #io-channel-cells = <1>;
-               io-channel-ranges;
-               clock-frequency = <10000>;
                clocks = <&clk_tsadc>, <&clk_gates20 0>;
-               clock-names = "tsadc", "pclk_tsadc";
-               pinctrl-names = "default", "tsadc_int";
-               pinctrl-0 = <&tsadc_gpio>;
-               pinctrl-1 = <&tsadc_int>;
-               tsadc-ht-temp = <120>;
-               tsadc-ht-reset-cru = <1>;
-               tsadc-ht-pull-gpio = <0>;
+               clock-names = "tsadc", "apb_pclk";
+               resets = <&reset RK3368_SRST_TSADC_P>;
+               reset-names = "tsadc-apb";
+               pinctrl-names = "default";
+               pinctrl-0 = <&tsadc_int>;
+               #thermal-sensor-cells = <1>;
+               hw-shut-temp = <120000>;
                status = "disabled";
        };
 

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 1ffd052199c6d7a3425300538f74ed313a66940d..12891ebbec492868d7bce1c958497dfb8d70fc6e 100644 (file)
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -354,6 +354,7 @@ CONFIG_POWER_AVS=y
 CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_SENSORS_ROCKCHIP_TSADC=y
 CONFIG_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_MFD_RT5025=y
 CONFIG_MISC_RT5025=y
 CONFIG_IRQ_RT5025=y

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 7fe7b7a97a9910f24142336b6418038ece0e166e..b1bbebac15a89982d9b8165430828b095d5dc5bc 100755 (executable)
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -47,15 +47,19 @@ enum tshut_polarity {
  * The system has three Temperature Sensors.  channel 0 is reserved,
  * channel 1 is for CPU, and channel 2 is for GPU.
  */
+ /*
 enum sensor_id {
        SENSOR_CPU = 1,
        SENSOR_GPU,
 };
+*/
 
 struct rockchip_tsadc_chip {
        long hw_shut_temp;
        enum tshut_mode tshut_mode;
        enum tshut_polarity tshut_polarity;
+       int cpu_id;
+       int gpu_id;
 
        /* Chip-wide methods */
        void (*initialize)(void __iomem *reg, enum tshut_polarity p);
@@ -72,7 +76,7 @@ struct rockchip_tsadc_chip {
 struct rockchip_thermal_sensor {
        struct rockchip_thermal_data *thermal;
        struct thermal_zone_device *tzd;
-       enum sensor_id id;
+       int id;
 };
 
 #define NUM_SENSORS    2 /* Ignore unused sensor 0 */
@@ -119,10 +123,15 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_PD_CLEAR                   ~BIT(8)
 
 #define TSADCV2_DATA_MASK                      0xfff
+#define TSADCV3_DATA_MASK                      0x3ff
+
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
+
 #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
 #define TSADCV2_AUTO_PERIOD_HT_TIME            50  /* msec */
+#define TSADCV3_AUTO_PERIOD_TIME               1500 /* msec */
+#define TSADCV3_AUTO_PERIOD_HT_TIME            1000  /* msec */
 
 struct tsadc_table {
        unsigned long code;
@@ -168,6 +177,45 @@ static const struct tsadc_table v2_code_table[] = {
        {0, 125000},
 };
 
+static const struct tsadc_table v3_code_table[] = {
+       {0, -40000},
+       {106, -40000},
+       {108, -35000},
+       {110, -30000},
+       {112, -25000},
+       {114, -20000},
+       {116, -15000},
+       {118, -10000},
+       {120, -5000},
+       {122, 0},
+       {124, 5000},
+       {126, 10000},
+       {128, 15000},
+       {130, 20000},
+       {132, 25000},
+       {134, 30000},
+       {136, 35000},
+       {138, 40000},
+       {140, 45000},
+       {142, 50000},
+       {144, 55000},
+       {146, 60000},
+       {148, 65000},
+       {150, 70000},
+       {152, 75000},
+       {154, 80000},
+       {156, 85000},
+       {158, 90000},
+       {160, 95000},
+       {162, 100000},
+       {163, 105000},
+       {165, 110000},
+       {167, 115000},
+       {169, 120000},
+       {171, 125000},
+       {TSADCV3_DATA_MASK, 125000},
+};
+
 static u32 rk_tsadcv2_temp_to_code(long temp)
 {
        int high, low, mid;
@@ -217,6 +265,58 @@ static long rk_tsadcv2_code_to_temp(u32 code)
        return 125000;
 }
 
+static u32 rk_tsadcv3_temp_to_code(long temp)
+{
+       int high, low, mid;
+
+
+       low = 0;
+       high = ARRAY_SIZE(v3_code_table) - 1;
+       mid = (high + low) / 2;
+
+       if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
+               return 0;
+
+       while (low <= high) {
+               if (temp == v3_code_table[mid].temp)
+                       return v3_code_table[mid].code;
+               else if (temp < v3_code_table[mid].temp)
+                       high = mid - 1;
+               else
+                       low = mid + 1;
+               mid = (low + high) / 2;
+       }
+
+       return 0;
+}
+
+static long rk_tsadcv3_code_to_temp(u32 code)
+{
+       int high, low, mid;
+
+       low = 0;
+       high = ARRAY_SIZE(v3_code_table) - 1;
+       mid = (high + low) / 2;
+
+       if (code < v3_code_table[low].code || code > v3_code_table[high].code)
+               return 125000; /* No code available, return max temperature */
+
+       while (low <= high) {
+               if (code <= v3_code_table[mid].code && code >
+                       v3_code_table[mid - 1].code) {
+                       return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
+                               v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
+                               / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
+               } else if (code > v3_code_table[mid].code)
+                       low = mid + 1;
+               else
+                       high = mid - 1;
+               mid = (low + high) / 2;
+       }
+
+       return 125000;
+}
+
 /**
  * rk_tsadcv2_initialize - initialize TASDC Controller
  * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
@@ -234,9 +334,6 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
        if (tshut_polarity == TSHUT_HIGH_ACTIVE)
                writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
                               regs + TSADCV2_AUTO_CON);
-       else
-               writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
-                              regs + TSADCV2_AUTO_CON);
 
        writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
        writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
@@ -247,6 +344,22 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
                       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 }
 
+static void rk_tsadcv3_initialize(void __iomem *regs,
+                                 enum tshut_polarity tshut_polarity)
+{
+       if (tshut_polarity == TSHUT_HIGH_ACTIVE)
+               writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
+                              regs + TSADCV2_AUTO_CON);
+
+       writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
+       writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+                      regs + TSADCV2_HIGHT_INT_DEBOUNCE);
+       writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
+                      regs + TSADCV2_AUTO_PERIOD_HT);
+       writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+                      regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+}
+
 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 {
        u32 val;
@@ -307,6 +420,45 @@ static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
        writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 }
 
+static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
+{
+       u32 val;
+
+       /* the A/D value of the channel last conversion need some time */
+       val = readl_relaxed(regs + TSADCV2_DATA(chn));
+       if (val == 0)
+               return -EAGAIN;
+
+       *temp = rk_tsadcv3_code_to_temp(val);
+
+       return 0;
+}
+
+static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
+{
+       u32 alarm_value, int_en;
+
+       alarm_value = rk_tsadcv3_temp_to_code(temp);
+       writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
+                      regs + TSADCV2_COMP_INT(chn));
+
+       int_en = readl_relaxed(regs + TSADCV2_INT_EN);
+       int_en |= TSADCV2_INT_SRC_EN(chn);
+       writel_relaxed(int_en, regs + TSADCV2_INT_EN);
+}
+
+static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
+{
+       u32 tshut_value, val;
+
+       tshut_value = rk_tsadcv3_temp_to_code(temp);
+       writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
+
+       /* TSHUT will be valid */
+       val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+       writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
+}
+
 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
                                  enum tshut_mode mode)
 {
@@ -328,6 +480,8 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
        .hw_shut_temp = 125000,
+       .cpu_id = 1,
+       .gpu_id = 2,
 
        .initialize = rk_tsadcv2_initialize,
        .irq_ack = rk_tsadcv2_irq_ack,
@@ -338,11 +492,31 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 };
 
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+       .hw_shut_temp = 125000,
+       .cpu_id = 0,
+       .gpu_id = 1,
+
+       .initialize = rk_tsadcv3_initialize,
+       .irq_ack = rk_tsadcv2_irq_ack,
+       .control = rk_tsadcv2_control,
+       .get_temp = rk_tsadcv3_get_temp,
+       .set_alarm_temp = rk_tsadcv3_alarm_temp,
+       .set_tshut_temp = rk_tsadcv3_tshut_temp,
+       .set_tshut_mode = rk_tsadcv2_tshut_mode,
+};
+
 static const struct of_device_id of_rockchip_thermal_match[] = {
        {
                .compatible = "rockchip,rk3288-tsadc",
                .data = (void *)&rk3288_tsadc_data,
        },
+       {
+               .compatible = "rockchip,rk3368-tsadc",
+               .data = (void *)&rk3368_tsadc_data,
+       },
        { /* end */ },
 };
 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
@@ -371,6 +545,7 @@ static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
        return IRQ_HANDLED;
 }
 
+/*
 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
 {
        struct rockchip_thermal_sensor *sensor = _sensor;
@@ -384,6 +559,7 @@ static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
 
        return 0;
 }
+*/
 
 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
 {
@@ -459,7 +635,7 @@ static int
 rockchip_thermal_register_sensor(struct platform_device *pdev,
                                 struct rockchip_thermal_data *thermal,
                                 struct rockchip_thermal_sensor *sensor,
-                                enum sensor_id id)
+                                int id)
 {
        const struct rockchip_tsadc_chip *tsadc = thermal->chip;
        int error;
@@ -471,7 +647,7 @@ rockchip_thermal_register_sensor(struct platform_device *pdev,
        sensor->id = id;
        sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
                                                rockchip_thermal_get_temp,
-                                               rockchip_thermal_set_trips);
+                                               NULL);
        if (IS_ERR(sensor->tzd)) {
                error = PTR_ERR(sensor->tzd);
                dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
@@ -576,7 +752,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
        error = rockchip_thermal_register_sensor(pdev, thermal,
                                                 &thermal->sensors[0],
-                                                SENSOR_CPU);
+                                                thermal->chip->cpu_id);
        if (error) {
                dev_err(&pdev->dev,
                        "failed to register CPU thermal sensor: %d\n", error);
@@ -585,7 +761,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
        error = rockchip_thermal_register_sensor(pdev, thermal,
                                                 &thermal->sensors[1],
-                                                SENSOR_GPU);
+                                                thermal->chip->gpu_id);
        if (error) {
                dev_err(&pdev->dev,
                        "failed to register GPU thermal sensor: %d\n", error);
@@ -680,7 +856,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
        thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
        for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
-               enum sensor_id id = thermal->sensors[i].id;
+               int id = thermal->sensors[i].id;
 
                thermal->chip->set_tshut_mode(id, thermal->regs,
                                              thermal->tshut_mode);