Documentation: bindings: add dt documentation for Rockchip PCIe PHY

This patch adds a binding that describes the Rockchip PCIe PHY found
on Rockchip SoCs PCIe interface.

Change-Id: I18940e940e0c951d3e2d6bb3b2131a37727a430d
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
new file mode 100644 (file)
index 0000000..aedca29
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
@@ -0,0 +1,32 @@
+Rockchip PCIE PHY
+-----------------------
+
+Required properties:
+ - compatible: rockchip,rk3399-pcie-phy
+ - #phy-cells: must be 0
+ - clocks: Must contain an entry in clock-names.
+       See ../clocks/clock-bindings.txt for details.
+ - clock-names: Must be "refclk"
+ - resets: Must contain an entry in reset-names.
+       See ../reset/reset.txt for details.
+ - reset-names: Must be "phy"
+
+Example:
+
+grf: syscon@ff770000 {
+       compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       ...
+
+       pcie_phy: pcie-phy {
+               compatible = "rockchip,rk3399-pcie-phy";
+               #phy-cells = <0>;
+               clocks = <&cru SCLK_PCIEPHY_REF>;
+               clock-names = "refclk";
+               resets = <&cru SRST_PCIEPHY>;
+               reset-names = "phy";
+       };
+};
+