arm64: dts: rk3368: don't assign clock rates for display pll
authorMark Yao <mark.yao@rock-chips.com>
Fri, 17 Mar 2017 01:36:32 +0000 (09:36 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 17 Mar 2017 06:19:58 +0000 (14:19 +0800)
NPLL is used for display pixelclock, assign clock rates would overlap
loader pll setting, cause display abnormal.

Change-Id: Iaf1094c43526c7ca7b364608fa7153d03f84326c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368.dtsi

index 19913ea..c3a29e3 100644 (file)
                #reset-cells = <1>;
                assigned-clocks =
                        <&cru PLL_GPLL>, <&cru PLL_CPLL>,
-                       <&cru PLL_NPLL>,
                        <&cru ACLK_BUS>, <&cru ACLK_PERI>,
                        <&cru HCLK_BUS>, <&cru HCLK_PERI>,
                        <&cru PCLK_BUS>, <&cru PCLK_PERI>;
                assigned-clock-rates =
                        <576000000>, <400000000>,
-                       <1188000000>,
                        <300000000>, <300000000>,
                        <150000000>, <150000000>,
                        <75000000>, <75000000>;