clk: fractional-divider: cast parent_rate to u64 before multiplying
authorHeiko Stübner <heiko@sntech.de>
Thu, 28 Aug 2014 10:46:10 +0000 (12:46 +0200)
committerMike Turquette <mturquette@linaro.org>
Wed, 10 Sep 2014 16:42:37 +0000 (09:42 -0700)
commitfeaefa0ea1f1ab3fb92519aef2099ab4d75cce05
tree7895ee89a3f1045280cfa41641bb661fd7954a43
parentf82a1d1586a2bd553431cf09d469ece17d1e61e7
clk: fractional-divider: cast parent_rate to u64 before multiplying

On 32bit architectures, like ARM calculating the fractional rate will
do the multiplication before converting the value to u64 when it gets
assigned to ret, which can produce overflows.

The error in question happened with a parent_rate of 386MHz, m = 3000,
n = 60000, which resulted in a wrong rate value of 15812Hz.

Therefore cast parent_rate to u64 to make sure the multiplication
happens in a 64bit space and produces the correct 192MHz in the example.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/clk-fractional-divider.c