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rk3368: clk: cpll: make cpll low jitter.
authorzhangqing <zhangqing@rock-chips.com>
Thu, 25 Jun 2015 23:50:06 +0000 (16:50 -0700)
committerzhangqing <zhangqing@rock-chips.com>
Thu, 25 Jun 2015 23:50:06 +0000 (16:50 -0700)
commit12a178aad255fb2380cd97e807153844c5dd87b2
treee4e3e71666e888b3700b6c6a3393469d3f4b6f21tree | snapshot
parentfca072d64bf891f3bedb41dbe12a2051b491aa2acommit | diff
rk3368: clk: cpll: make cpll low jitter.

This modify is for cpll low jitter.
Make the signal of clk_gmac better.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
arch/arm64/boot/dts/rk3368-clocks.dtsi diff | blob | history
drivers/clk/rockchip/clk-pll.c diff | blob | history
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