arm64: dts: rockchip: remove unneeded idle-states for rk3368

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3368.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 1ae4689629522c052a1b3a6ad9383a92c4fa4e53..4d0da4e312de4a63a899e6b0861549920ed9d767 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -112,23 +112,10 @@
                        };
                };
 
-               idle-states {
-                       entry-method = "psci";
-
-                       cpu_sleep: cpu-sleep-0 {
-                               compatible = "arm,idle-state";
-                               arm,psci-suspend-param = <0x1010000>;
-                               entry-latency-us = <0x3fffffff>;
-                               exit-latency-us = <0x40000000>;
-                               min-residency-us = <0xffffffff>;
-                       };
-               };
-
                cpu_l0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x0>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        operating-points-v2 = <&cluster0_opp>;
@@ -141,7 +128,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x1>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        operating-points-v2 = <&cluster0_opp>;
@@ -152,7 +138,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x2>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        operating-points-v2 = <&cluster0_opp>;
@@ -163,7 +148,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x3>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        operating-points-v2 = <&cluster0_opp>;
@@ -174,7 +158,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x100>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        operating-points-v2 = <&cluster1_opp>;
@@ -187,7 +170,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x101>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        operating-points-v2 = <&cluster1_opp>;
@@ -198,7 +180,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x102>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        operating-points-v2 = <&cluster1_opp>;
@@ -209,7 +190,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0 0x103>;
-                       cpu-idle-states = <&cpu_sleep>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        operating-points-v2 = <&cluster1_opp>;
@@ -473,13 +453,6 @@
                #clock-cells = <0>;
        };
 
-       xin32k: xin32k {
-               compatible = "fixed-clock";
-               clock-frequency = <32768>;
-               clock-output-names = "xin32k";
-               #clock-cells = <0>;
-       };
-
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff0c0000 0x0 0x4000>;
@@ -747,6 +720,7 @@
                nvmem-cell-names = "temp_adjust";
                #thermal-sensor-cells = <1>;
                hw-shut-temp = <95000>;
+               latency-bound = <50000>;
                status = "disabled";
        };
 
@@ -1119,12 +1093,14 @@
                        <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                        <&cru ACLK_BUS>, <&cru ACLK_PERI>,
                        <&cru HCLK_BUS>, <&cru HCLK_PERI>,
-                       <&cru PCLK_BUS>, <&cru PCLK_PERI>;
+                       <&cru PCLK_BUS>, <&cru PCLK_PERI>,
+                       <&cru ACLK_CCI_PRE>;
                assigned-clock-rates =
                        <576000000>, <400000000>,
                        <300000000>, <300000000>,
                        <150000000>, <150000000>,
-                       <75000000>, <75000000>;
+                       <75000000>, <75000000>,
+                       <576000000>;
        };
 
        grf: syscon@ff770000 {
@@ -1341,6 +1317,8 @@
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru PCLK_MIPI_DSI0>;
                clock-names = "pclk";
+               resets = <&cru SRST_MIPIDSI0>;
+               reset-names = "apb";
                phys = <&mipi_dphy>;
                phy-names = "mipi_dphy";
                rockchip,grf = <&grf>;
@@ -1349,17 +1327,9 @@
                #size-cells = <0>;
                status = "disabled";
 
-               ports@1 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <1>;
-
-                       mipi_in: port {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               mipi_in_vop: endpoint@0 {
-                                       reg = <0>;
+               ports {
+                       port {
+                               mipi_in_vop: endpoint {
                                        remote-endpoint = <&vop_out_mipi>;
                                };
                        };
@@ -1372,6 +1342,8 @@
                #phy-cells = <0>;
                clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
                clock-names = "ref", "pclk";
+               resets = <&cru SRST_MIPIDPHYTX>;
+               reset-names = "apb";
                status = "disabled";
        };