#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/rk_fb.h>
#include <dt-bindings/power/rk3366-power.h>
+#include <dt-bindings/soc/rockchip_boot-mode.h>
/ {
compatible = "rockchip,rk3366";
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ clocks = <&cru ARMCLK>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <1200000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1200000>;
};
};
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
- <&cru SCLK_MAC_RX>, <&cru SCLK_MACREF>,
+ <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>,
<&cru SCLK_MACREF_OUT>, <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>;
clock-names = "stmmaceth", "mac_clk_rx",
status = "disabled";
};
+ usb_host0_echi: usb@ff480000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xff480000 0x0 0x20000>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>;
+ clock-names = "sclk_otgphy0", "hclk_host0";
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@ff4a0000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff4a0000 0x0 0x20000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>;
+ clock-names = "sclk_otgphy0", "hclk_host0";
+ status = "disabled";
+ };
+
usb_otg: usb@ff4c0000 {
compatible = "rockchip,rk3368-usb", "rockchip,rk3066-usb",
"snps,dwc2";
};
pmugrf: syscon@ff738000 {
- compatible = "rockchip,rk3366-pmugrf", "syscon";
+ compatible = "rockchip,rk3366-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff738000 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-normal = <BOOT_NORMAL>;
+ mode-recovery = <BOOT_RECOVERY>;
+ mode-fastboot = <BOOT_FASTBOOT>;
+ mode-loader = <BOOT_LOADER>;
+ };
};
amba {
reg = <0x0 0xff770000 0x0 0x1000>;
};
+ wdt: watchdog@ff800000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x0 0xff800000 0x0 0x100>;
+ clocks = <&cru PCLK_WDT>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ spdif: spdif@ff880000 {
+ compatible = "rockchip,rk3366-spdif";
+ reg = <0x0 0xff880000 0x0 0x1000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac_bus 3>;
+ dma-names = "tx";
+ clock-names = "hclk", "mclk";
+ clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF_8CH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_bus>;
+ status = "disabled";
+ };
+
i2s_2ch: i2s-2ch@ff890000 {
compatible = "rockchip,rk3366-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff890000 0x0 0x1000>;
<5 15 RK_FUNC_2 &pcfg_pull_none>,
<5 16 RK_FUNC_2 &pcfg_pull_none>;
};
+
+ i2c2_gpio: i2c2-gpio {
+ rockchip,pins =
+ <5 15 RK_FUNC_GPIO &pcfg_pull_none>,
+ <5 16 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
i2c3 {
<5 8 RK_FUNC_1 &pcfg_pull_none>,
<5 9 RK_FUNC_1 &pcfg_pull_none>;
};
+
+ i2c4_gpio: i2c4-gpio {
+ rockchip,pins =
+ <5 8 RK_FUNC_GPIO &pcfg_pull_none>,
+ <5 9 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
i2c5 {
};
};
+ spdif {
+ spdif_bus: spdif-bus {
+ rockchip,pins =
+ <5 19 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
spi0 {
spi0_clk: spi0-clk {
rockchip,pins =
/* mac_rxd2 */
<2 6 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txd3 */
- <2 5 RK_FUNC_1 &pcfg_pull_none>,
+ <2 5 RK_FUNC_1 &pcfg_pull_none_12ma>,
/* mac_txd2 */
- <2 4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 4 RK_FUNC_1 &pcfg_pull_none_12ma>,
/* mac_rxd1 */
<2 3 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd0 */
<2 2 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txd1 */
- <2 1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 1 RK_FUNC_1 &pcfg_pull_none_12ma>,
/* mac_txd0 */
<2 0 RK_FUNC_1 &pcfg_pull_none>,
+ /* mac_txclkout */
+ <2 17 RK_FUNC_1 &pcfg_pull_none_12ma>,
/* mac_crs */
/* <2 15 RK_FUNC_1 &pcfg_pull_none>, */
/* mac_rxclkin */
/* mac_mdio */
<2 13 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txen */
- <2 12 RK_FUNC_1 &pcfg_pull_none>,
+ <2 12 RK_FUNC_1 &pcfg_pull_none_12ma>,
/* mac_clk */
<2 11 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxer */
eth_phy {
eth_phy_pwr: eth-phy-pwr {
rockchip,pins =
- <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
+ <0 25 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};