arm: dts: rk3288-evb-act8846: add power supply for eDP

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk312x-clocks.dtsi

diff --git a/arch/arm/boot/dts/rk312x-clocks.dtsi b/arch/arm/boot/dts/rk312x-clocks.dtsi
index d1b1ab073ec0163f61b1a42fc7a8569bdc3006f6..1cdc3b63317f16cccd58d3aa5544af619320dc3b 100755 (executable)
--- a/arch/arm/boot/dts/rk312x-clocks.dtsi
+++ b/arch/arm/boot/dts/rk312x-clocks.dtsi
@@ -39,10 +39,10 @@
                                #clock-cells = <0>;
                        };
 
-                       gmac_clkin: rmii_clkin {
+                       gmac_clkin: gmac_clkin {
                                compatible = "rockchip,rk-fixed-clock";
                                clock-output-names = "gmac_clkin";
-                               clock-frequency = <0>;
+                               clock-frequency = <125000000>;
                                #clock-cells = <0>;
                        };
 
@@ -119,10 +119,10 @@
                                #clock-cells = <0>;
                        };
 
-                       clk_pvtm_func: clk_pvtm_func {
+                       g_clk_pvtm_func: g_clk_pvtm_func {
                                compatible = "rockchip,rk-fixed-factor-clock";
                                clocks = <&xin24m>;
-                               clock-output-names = "clk_pvtm_func";
+                               clock-output-names = "g_clk_pvtm_func";
                                clock-div = <1>;
                                clock-mult = <1>;
                                #clock-cells = <0>;
@@ -155,6 +155,33 @@
                                #clock-cells = <0>;
                        };
 
+                       hclk_vio_niu: hclk_vio_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&hclk_vio_pre>;
+                               clock-output-names = "hclk_vio_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio0_niu: aclk_vio0_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio0_pre>;
+                               clock-output-names = "aclk_vio0_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio1_niu: aclk_vio1_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio1_pre>;
+                               clock-output-names = "aclk_vio1_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
                };
 
                pd_cons {
@@ -181,18 +208,10 @@
                                #clock-cells = <0>;
                        };
 
-                       pd_vop0: pd_vop0 {
+                       pd_vop: pd_vop {
                                compatible = "rockchip,rk-pd-clock";
                                clocks = <&pd_vio>;
-                               clock-output-names = "pd_vop0";
-                               rockchip,pd-id = <CLK_PD_VIRT>;
-                               #clock-cells = <0>;
-                       };
-
-                       pd_vop1: pd_vop1 {
-                               compatible = "rockchip,rk-pd-clock";
-                               clocks = <&pd_vio>;
-                               clock-output-names = "pd_vop1";
+                               clock-output-names = "pd_vop";
                                rockchip,pd-id = <CLK_PD_VIRT>;
                                #clock-cells = <0>;
                        };
@@ -433,7 +452,7 @@
                                        clk_pvtm_div: clk_pvtm_div {
                                                compatible = "rockchip,rk3188-mux-con";
                                                rockchip,bits = <0 7>;
-                                               clocks = <&clk_pvtm_func>;
+                                               clocks = <&g_clk_pvtm_func>;
                                                clock-output-names = "clk_pvtm";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
@@ -1187,7 +1206,7 @@
                                                #clock-cells = <0>;
                                                rockchip,flags = <(CLK_GET_RATE_NOCACHE |
                                                                        CLK_SET_RATE_NO_REPARENT)>;
-                                               rockchip,clkops-idx = <CLKOPS_RATE_DDR>;
+                                               rockchip,clkops-idx = <CLKOPS_RATE_DDR_DIV2>;
                                        };
 
                                        /* reg[7:2]: reserved */
@@ -1287,7 +1306,6 @@
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
                                                        <CLKOPS_RATE_MUX_DIV>;
-                                               rockchip,flags = <CLK_SET_RATE_NO_REPARENT>;
                                        };
 
                                        clk_cif_out: clk_cif_out_mux {
@@ -1470,11 +1488,11 @@
                                        #address-cells = <1>;
                                        #size-cells = <1>;
 
-                                       clk_gpu_pre_div: clk_gpu_pre_div {
+                                       clk_gpu_div: clk_gpu_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <0 5>;
-                                               clocks = <&clk_gpu_pre>;
-                                               clock-output-names = "clk_gpu_pre";
+                                               clocks = <&clk_gpu>;
+                                               clock-output-names = "clk_gpu";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
@@ -1482,11 +1500,11 @@
                                                rockchip,flags = <CLK_SET_RATE_PARENT_IN_ORDER>;
                                        };
 
-                                       clk_gpu_pre: clk_gpu_pre_mux {
+                                       clk_gpu: clk_gpu_mux {
                                                compatible = "rockchip,rk3188-mux-con";
                                                rockchip,bits = <5 3>;
-                                               clocks = <&dummy_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>;
-                                               clock-output-names = "clk_gpu_pre";
+                                               clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>;
+                                               clock-output-names = "clk_gpu";
                                                #clock-cells = <0>;
                                                #clock-init-cells = <1>;
                                        };
@@ -1542,7 +1560,7 @@
 
                                        clock-output-names =
                                                "pclk_dbg",                     "aclk_cpu",      /*clk_cpu_cpll*/
-                                               "clk_ddr",              "aclk_cpu_pre",
+                                               "reserved",             "aclk_cpu_pre",
 
                                                "hclk_cpu_pre",         "pclk_cpu_pre",
                                                "clk_core",             "aclk_core_pre",
@@ -1552,7 +1570,7 @@
 
                                                "clk_crypto",           "clk_i2s_2ch_out",
                                                "clk_i2s_2ch",          "clk_testout";
-                                       rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                       rockchip,suspend-clkgating-setting=<0x11ff 0x0>;
 
                                        #clock-cells = <1>;
                                };
@@ -1586,7 +1604,7 @@
                                                "clk_uart2_div",        "uart2_frac",
                                                "clk_tsp",      "reserved";
 
-                                        rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                        rockchip,suspend-clkgating-setting=<0x000f 0x0>;
                                        #clock-cells = <1>;
                                };
 
@@ -1617,7 +1635,7 @@
 
                                                "spdif_frac",           "clk_sdio",
                                                "clk_emmc",             "clk_mipi_24m";
-                                           rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                           rockchip,suspend-clkgating-setting=<0x000f 0x0>;
 
                                        #clock-cells = <1>;
                                };
@@ -1635,7 +1653,7 @@
                                                <&pclk_cpu_pre>,                <&clk_vepu>,
                                                <&clk_hevc_core>,               <&clk_vdpu>,
 
-                                               <&hclk_vdpu>,           <&clk_gpu_pre>,
+                                               <&hclk_vdpu>,           <&clk_gpu>,
                                                <&aclk_peri>,           <&clk_sfc>;
 
                                        clock-output-names =
@@ -1648,9 +1666,9 @@
                                                "g_pclk_hdmi",          "clk_vepu",
                                                "clk_hevc_core",                "clk_vdpu",
 
-                                               "hclk_vdpu",            "clk_gpu_pre",
+                                               "hclk_vdpu",            "clk_gpu",
                                                "g_hclk_gps",           "clk_sfc";
-                                       rockchip,suspend-clkgating-setting=<0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting=<0x0060 0x0000>;
 
                                        #clock-cells = <1>;
                                };
@@ -1685,7 +1703,7 @@
                                                "g_aclk_intmem",                "reserved",
                                                "reserved",             "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0xff8f 0x0000>;
                                        #clock-cells = <1>;
                                };
 
@@ -1718,7 +1736,7 @@
                                                "reserved",             "g_hclk_otg0",
                                                "g_pclk_acodec",                "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x00f0 0x0000>;
 
                                        #clock-cells = <1>;
                                };
@@ -1727,14 +1745,14 @@
                                        compatible = "rockchip,rk3188-gate-clk";
                                        reg = <0x00e8 0x4>;
                                        clocks =
-                                               <&aclk_vio0_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio0_niu>,               <&hclk_vio_niu>,
                                                <&dummy>,               <&dummy>,
 
-                                               <&hclk_vio_pre>,                <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                <&aclk_vio0_niu>,
                                                <&dummy>,               <&dummy>,
 
                                                <&dummy>,               <&dummy>,
-                                               <&hclk_vio_pre>,                        <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                        <&aclk_vio0_niu>,
 
                                                <&hclk_vio_pre>,                <&aclk_vio0_pre>,
                                                <&dummy>,               <&dummy>;
@@ -1749,7 +1767,7 @@
                                                "reserved",             "reserved",
                                                "g_hclk_rga",           "g_aclk_rga",
 
-                                               "g_hclk_vio_bus",               "g_aclk_vio",
+                                               "hclk_vio_niu",         "aclk_vio0_niu",
                                                "reserved",             "reserved";
 
                                        rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
@@ -1786,7 +1804,7 @@
                                                "g_pclk_spi0",          "reserved",
                                                "g_pclk_saradc",                "g_pclk_wdt";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x8480 0x0000>;
 
                                        #clock-cells = <1>;
                                };
@@ -1820,7 +1838,7 @@
                                                "g_pclk_gpio3",         "reserved",
                                                "reserved",             "reserved";
 
-                                        rockchip,suspend-clkgating-setting=<0x0000 0x0000>;
+                                        rockchip,suspend-clkgating-setting=<0xff0f 0x0000>;
                                        #clock-cells = <1>;
                                };
 
@@ -1831,10 +1849,10 @@
                                                <&dummy>,               <&dummy>,
                                                <&pclk_pmu_pre>,                <&pclk_pmu_pre>,
 
-                                               <&dummy>,               <&hclk_vio_pre>,
-                                               <&hclk_vio_pre>,                <&hclk_vio_pre>,
+                                               <&dummy>,               <&hclk_vio_niu>,
+                                               <&hclk_vio_niu>,                <&hclk_vio_niu>,
 
-                                               <&aclk_vio1_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio1_niu>,               <&hclk_vio_niu>,
                                                <&aclk_vio1_pre>,               <&dummy>,
 
                                                <&pclk_peri_pre>,               <&hclk_peri_pre>,
@@ -1848,12 +1866,12 @@
                                                "g_pclk_mipi",          "g_hclk_iep",
 
                                                "g_aclk_iep",           "g_hclk_ebc",
-                                               "g_aclk_vio1_niu",              "reserved",
+                                               "aclk_vio1_niu",                "reserved",
 
                                                "g_pclk_sim_card",              "g_hclk_usb_peri",
                                                "g_hclk_pe_arbi",               "g_aclk_peri_niu";
 
-                                       rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                       rockchip,suspend-clkgating-setting=<0xf00f 0x0>;
 
                                        #clock-cells = <1>;
                                };
@@ -1875,8 +1893,8 @@
                                                <&hclk_peri_pre>,               <&clk_nandc>;
 
                                        clock-output-names =
-                                               "clk_pvtm_core",                "clk_pvtm_gpu",
-                                               "clk_pvtm_func",                "clk_timer0",
+                                               "g_clk_pvtm_core",              "g_clk_pvtm_gpu",
+                                               "g_clk_pvtm_func",              "clk_timer0",
 
                                                "clk_timer1",           "clk_timer2",
                                                "clk_timer3",           "clk_timer4",
@@ -1887,7 +1905,7 @@
                                                "g_hclk_tsp",           "g_clkin0_tsp",
                                                "g_hclk_usbhost",               "clk_nandc";
 
-                                       rockchip,suspend-clkgating-setting = <0x0 0x0>; /* pwm logic vol */
+                                       rockchip,suspend-clkgating-setting = <0x0000 0x0>;      /* pwm logic vol */
 
                                        #clock-cells = <1>;
                                };