arm: dts: rk3288-evb-act8846: add power supply for eDP

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk312x-clocks.dtsi

diff --git a/arch/arm/boot/dts/rk312x-clocks.dtsi b/arch/arm/boot/dts/rk312x-clocks.dtsi
index 89949477da554da64c1d43879bec4c1599f10559..1cdc3b63317f16cccd58d3aa5544af619320dc3b 100755 (executable)
--- a/arch/arm/boot/dts/rk312x-clocks.dtsi
+++ b/arch/arm/boot/dts/rk312x-clocks.dtsi
@@ -155,6 +155,33 @@
                                #clock-cells = <0>;
                        };
 
+                       hclk_vio_niu: hclk_vio_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&hclk_vio_pre>;
+                               clock-output-names = "hclk_vio_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio0_niu: aclk_vio0_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio0_pre>;
+                               clock-output-names = "aclk_vio0_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio1_niu: aclk_vio1_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio1_pre>;
+                               clock-output-names = "aclk_vio1_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
                };
 
                pd_cons {
@@ -1179,7 +1206,7 @@
                                                #clock-cells = <0>;
                                                rockchip,flags = <(CLK_GET_RATE_NOCACHE |
                                                                        CLK_SET_RATE_NO_REPARENT)>;
-                                               rockchip,clkops-idx = <CLKOPS_RATE_DDR>;
+                                               rockchip,clkops-idx = <CLKOPS_RATE_DDR_DIV2>;
                                        };
 
                                        /* reg[7:2]: reserved */
@@ -1279,7 +1306,6 @@
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
                                                        <CLKOPS_RATE_MUX_DIV>;
-                                               rockchip,flags = <CLK_SET_RATE_NO_REPARENT>;
                                        };
 
                                        clk_cif_out: clk_cif_out_mux {
@@ -1477,7 +1503,7 @@
                                        clk_gpu: clk_gpu_mux {
                                                compatible = "rockchip,rk3188-mux-con";
                                                rockchip,bits = <5 3>;
-                                               clocks = <&dummy_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>;
+                                               clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>;
                                                clock-output-names = "clk_gpu";
                                                #clock-cells = <0>;
                                                #clock-init-cells = <1>;
@@ -1534,7 +1560,7 @@
 
                                        clock-output-names =
                                                "pclk_dbg",                     "aclk_cpu",      /*clk_cpu_cpll*/
-                                               "clk_ddr",              "aclk_cpu_pre",
+                                               "reserved",             "aclk_cpu_pre",
 
                                                "hclk_cpu_pre",         "pclk_cpu_pre",
                                                "clk_core",             "aclk_core_pre",
@@ -1719,14 +1745,14 @@
                                        compatible = "rockchip,rk3188-gate-clk";
                                        reg = <0x00e8 0x4>;
                                        clocks =
-                                               <&aclk_vio0_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio0_niu>,               <&hclk_vio_niu>,
                                                <&dummy>,               <&dummy>,
 
-                                               <&hclk_vio_pre>,                <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                <&aclk_vio0_niu>,
                                                <&dummy>,               <&dummy>,
 
                                                <&dummy>,               <&dummy>,
-                                               <&hclk_vio_pre>,                        <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                        <&aclk_vio0_niu>,
 
                                                <&hclk_vio_pre>,                <&aclk_vio0_pre>,
                                                <&dummy>,               <&dummy>;
@@ -1741,7 +1767,7 @@
                                                "reserved",             "reserved",
                                                "g_hclk_rga",           "g_aclk_rga",
 
-                                               "g_hclk_vio_bus",               "g_aclk_vio",
+                                               "hclk_vio_niu",         "aclk_vio0_niu",
                                                "reserved",             "reserved";
 
                                        rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
@@ -1778,7 +1804,7 @@
                                                "g_pclk_spi0",          "reserved",
                                                "g_pclk_saradc",                "g_pclk_wdt";
 
-                                       rockchip,suspend-clkgating-setting = <0x8080 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x8480 0x0000>;
 
                                        #clock-cells = <1>;
                                };
@@ -1823,10 +1849,10 @@
                                                <&dummy>,               <&dummy>,
                                                <&pclk_pmu_pre>,                <&pclk_pmu_pre>,
 
-                                               <&dummy>,               <&hclk_vio_pre>,
-                                               <&hclk_vio_pre>,                <&hclk_vio_pre>,
+                                               <&dummy>,               <&hclk_vio_niu>,
+                                               <&hclk_vio_niu>,                <&hclk_vio_niu>,
 
-                                               <&aclk_vio1_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio1_niu>,               <&hclk_vio_niu>,
                                                <&aclk_vio1_pre>,               <&dummy>,
 
                                                <&pclk_peri_pre>,               <&hclk_peri_pre>,
@@ -1840,7 +1866,7 @@
                                                "g_pclk_mipi",          "g_hclk_iep",
 
                                                "g_aclk_iep",           "g_hclk_ebc",
-                                               "g_aclk_vio1_niu",              "reserved",
+                                               "aclk_vio1_niu",                "reserved",
 
                                                "g_pclk_sim_card",              "g_hclk_usb_peri",
                                                "g_hclk_pe_arbi",               "g_aclk_peri_niu";