3 * Copyright (c) Fuzhou Rockchip Electronics Co.Ltd
5 * Mark Yao <yzq@rock-chips.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #ifndef _UAPI_ROCKCHIP_DRM_H
16 #define _UAPI_ROCKCHIP_DRM_H
21 * User-desired buffer creation information structure.
23 * @size: user-desired memory allocation size.
24 * @flags: user request for setting memory type or cache attributes.
25 * @handle: returned a handle to created gem object.
26 * - this handle will be set by gem module of kernel side.
28 struct drm_rockchip_gem_create {
35 * A structure for getting buffer offset.
37 * @handle: a pointer to gem object created.
38 * @pad: just padding to be 64-bit aligned.
39 * @offset: relatived offset value of the memory region allocated.
40 * - this value should be set by user.
42 struct drm_rockchip_gem_map_off {
48 /* acquire type definitions. */
49 enum drm_rockchip_gem_cpu_acquire_type {
50 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_SHARED = 0x0,
51 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_EXCLUSIVE = 0x1,
55 * A structure for acquiring buffer for CPU access.
57 * @handle: a handle to gem object created.
58 * @flags: acquire flag
60 struct drm_rockchip_gem_cpu_acquire {
66 * A structure for releasing buffer for GPU access.
68 * @handle: a handle to gem object created.
70 struct drm_rockchip_gem_cpu_release {
74 struct drm_rockchip_rga_get_ver {
79 struct drm_rockchip_rga_cmd {
84 enum drm_rockchip_rga_buf_type {
85 RGA_BUF_TYPE_USERPTR = 1 << 31,
86 RGA_BUF_TYPE_GEMFD = 1 << 30,
89 struct drm_rockchip_rga_set_cmdlist {
97 struct drm_rockchip_rga_exec {
101 enum rockchip_plane_feture {
102 ROCKCHIP_DRM_PLANE_FEATURE_SCALE,
103 ROCKCHIP_DRM_PLANE_FEATURE_ALPHA,
104 ROCKCHIP_DRM_PLANE_FEATURE_MAX,
107 enum rockchip_crtc_feture {
108 ROCKCHIP_DRM_CRTC_FEATURE_AFBDC,
111 #define DRM_ROCKCHIP_GEM_CREATE 0x00
112 #define DRM_ROCKCHIP_GEM_MAP_OFFSET 0x01
113 #define DRM_ROCKCHIP_GEM_CPU_ACQUIRE 0x02
114 #define DRM_ROCKCHIP_GEM_CPU_RELEASE 0x03
116 #define DRM_ROCKCHIP_RGA_GET_VER 0x20
117 #define DRM_ROCKCHIP_RGA_SET_CMDLIST 0x21
118 #define DRM_ROCKCHIP_RGA_EXEC 0x22
120 #define DRM_IOCTL_ROCKCHIP_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
121 DRM_ROCKCHIP_GEM_CREATE, struct drm_rockchip_gem_create)
123 #define DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \
124 DRM_ROCKCHIP_GEM_MAP_OFFSET, struct drm_rockchip_gem_map_off)
126 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_ACQUIRE DRM_IOWR(DRM_COMMAND_BASE + \
127 DRM_ROCKCHIP_GEM_CPU_ACQUIRE, struct drm_rockchip_gem_cpu_acquire)
129 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_RELEASE DRM_IOWR(DRM_COMMAND_BASE + \
130 DRM_ROCKCHIP_GEM_CPU_RELEASE, struct drm_rockchip_gem_cpu_release)
132 #define DRM_IOCTL_ROCKCHIP_RGA_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
133 DRM_ROCKCHIP_RGA_GET_VER, struct drm_rockchip_rga_get_ver)
135 #define DRM_IOCTL_ROCKCHIP_RGA_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
136 DRM_ROCKCHIP_RGA_SET_CMDLIST, struct drm_rockchip_rga_set_cmdlist)
138 #define DRM_IOCTL_ROCKCHIP_RGA_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
139 DRM_ROCKCHIP_RGA_EXEC, struct drm_rockchip_rga_exec)
141 #endif /* _UAPI_ROCKCHIP_DRM_H */