1 #ifndef __RKCAMSYS_HEAR_H__
2 #define __RKCAMSYS_HEAR_H__
4 #include <linux/ioctl.h>
7 * C A M S Y S H E A D F I L E V E R S I O N
12 * 1) modify camsys_irqcnnt_t;
14 * 1) add support cif phy for marvin;
16 * 1) add clock information in struct camsys_devio_name_s;
18 * 1) add pwren control
20 * 1) add support mipi phy configuration;
21 * 2) add support io domain and mclk driver strength configuration;
23 1) add flash_trigger_out control
25 #define CAMSYS_HEAD_VERSION KERNEL_VERSION(0,7,0)
27 #define CAMSYS_MARVIN_DEVNAME "camsys_marvin"
28 #define CAMSYS_CIF0_DEVNAME "camsys_cif0"
29 #define CAMSYS_CIF1_DEVNAME "camsys_cif1"
31 #define CAMSYS_NAME_LEN 32
33 #define CAMSYS_DEVID_MARVIN 0x00000001
34 #define CAMSYS_DEVID_CIF_0 0x00000002
35 #define CAMSYS_DEVID_CIF_1 0x00000004
36 #define CAMSYS_DEVID_INTERNAL 0x000000FF
38 #define CAMSYS_DEVID_SENSOR_1A 0x01000000
39 #define CAMSYS_DEVID_SENSOR_1B 0x02000000
40 #define CAMSYS_DEVID_SENSOR_2 0x04000000
41 #define CAMSYS_DEVID_EXTERNAL 0xFF000000
42 #define CAMSYS_DEVID_EXTERNAL_NUM 8
44 #define CAMSYS_DEVCFG_FLASHLIGHT 0x00000001
45 #define CAMSYS_DEVCFG_PREFLASHLIGHT 0x00000002
46 #define CAMSYS_DEVCFG_SHUTTER 0x00000004
48 typedef struct camsys_irqsta_s {
49 unsigned int ris; //Raw interrupt status
50 unsigned int mis; //Masked interrupt status
53 typedef struct camsys_irqcnnt_s {
55 unsigned int timeout; //us
61 typedef enum camsys_mmap_type_e { //this type can be filled in mmap offset argument
62 CamSys_Mmap_RegisterMem,
68 typedef struct camsys_querymem_s {
69 camsys_mmap_type_t mem_type;
70 unsigned long mem_offset;
72 unsigned int mem_size;
75 typedef struct camsys_i2c_info_s {
76 unsigned char bus_num;
77 unsigned short slave_addr;
78 unsigned int reg_addr; //i2c device register address
79 unsigned int reg_size; //register address size
81 unsigned int val_size; //register value size
82 unsigned int i2cbuf_directly;
83 unsigned int i2cbuf_bytes;
84 unsigned int speed; //100000 == 100KHz
87 typedef struct camsys_reginfo_s {
88 unsigned int dev_mask;
89 unsigned int reg_offset;
93 typedef enum camsys_sysctrl_ops_e {
102 CamSys_Gpio_Start_Tag,
110 CamSys_Clk_Start_Tag,
114 CamSys_Phy_Start_Tag,
117 CamSys_Flash_Trigger_Start_Tag,
118 CamSys_Flash_Trigger,
119 CamSys_Flash_Trigger_End_Tag
121 } camsys_sysctrl_ops_t;
123 typedef struct camsys_regulator_info_s {
124 unsigned char name[CAMSYS_NAME_LEN];
127 } camsys_regulator_info_t;
129 typedef struct camsys_gpio_info_s {
130 unsigned char name[CAMSYS_NAME_LEN];
132 } camsys_gpio_info_t;
134 typedef struct camsys_sysctrl_s {
135 unsigned int dev_mask;
136 camsys_sysctrl_ops_t ops;
139 unsigned int rev[20];
142 typedef struct camsys_flash_info_s {
143 camsys_gpio_info_t fl;
144 } camsys_flash_info_t;
146 typedef struct camsys_mipiphy_s {
147 unsigned int data_en_bit; // data lane enable bit;
148 unsigned int bit_rate; // Mbps/lane
149 unsigned int phy_index; // phy0,phy1
152 typedef enum camsys_fmt_e {
153 CamSys_Fmt_Yuv420_8b = 0x18,
154 CamSys_Fmt_Yuv420_10b = 0x19,
155 CamSys_Fmt_LegacyYuv420_8b = 0x19,
157 CamSys_Fmt_Yuv422_8b = 0x1e,
158 CamSys_Fmt_Yuv422_10b = 0x1f,
160 CamSys_Fmt_Raw_6b = 0x28,
161 CamSys_Fmt_Raw_7b = 0x29,
162 CamSys_Fmt_Raw_8b = 0x2a,
163 CamSys_Fmt_Raw_10b = 0x2b,
164 CamSys_Fmt_Raw_12b = 0x2c,
165 CamSys_Fmt_Raw_14b = 0x2d,
168 typedef enum camsys_cifio_e {
169 CamSys_SensorBit0_CifBit0 = 0x00,
170 CamSys_SensorBit0_CifBit2 = 0x01,
173 typedef struct camsys_cifphy_s {
174 unsigned int cif_num;
176 camsys_cifio_t cifio;
180 typedef enum camsys_phy_type_e {
187 typedef struct camsys_extdev_phy_s {
188 camsys_phy_type_t type;
190 camsys_mipiphy_t mipi;
194 } camsys_extdev_phy_t;
196 typedef struct camsys_extdev_clk_s {
197 unsigned int in_rate;
198 unsigned int driver_strength; //0 - 3
199 } camsys_extdev_clk_t;
201 typedef struct camsys_devio_name_s {
204 camsys_regulator_info_t avdd; // sensor avdd power regulator name
205 camsys_regulator_info_t dovdd; // sensor dovdd power regulator name
206 camsys_regulator_info_t dvdd; // sensor dvdd power regulator name "NC" describe no regulator
207 camsys_regulator_info_t afvdd;
209 camsys_gpio_info_t pwrdn; // standby gpio name
210 camsys_gpio_info_t rst; // hard reset gpio name
211 camsys_gpio_info_t afpwr; // auto focus vcm driver ic power gpio name
212 camsys_gpio_info_t afpwrdn; // auto focus vcm driver ic standby gpio
213 camsys_gpio_info_t pwren; // power enable gpio name
216 camsys_flash_info_t fl;
218 camsys_extdev_phy_t phy;
219 camsys_extdev_clk_t clk;
221 unsigned int dev_cfg; // function bit mask configuration
222 } camsys_devio_name_t;
224 typedef struct camsys_version_s {
225 unsigned int drv_ver;
226 unsigned int head_ver;
230 * I O C T L C O D E S F O R R O C K C H I P S C A M S Y S D E V I C E S
233 #define CAMSYS_IOC_MAGIC 'M'
234 #define CAMSYS_IOC_MAXNR 14
236 #define CAMSYS_VERCHK _IOR(CAMSYS_IOC_MAGIC, 0, camsys_version_t)
238 #define CAMSYS_I2CRD _IOWR(CAMSYS_IOC_MAGIC, 1, camsys_i2c_info_t)
239 #define CAMSYS_I2CWR _IOW(CAMSYS_IOC_MAGIC, 2, camsys_i2c_info_t)
241 #define CAMSYS_SYSCTRL _IOW(CAMSYS_IOC_MAGIC, 3, camsys_sysctrl_t)
242 #define CAMSYS_REGRD _IOWR(CAMSYS_IOC_MAGIC, 4, camsys_reginfo_t)
243 #define CAMSYS_REGWR _IOW(CAMSYS_IOC_MAGIC, 5, camsys_reginfo_t)
244 #define CAMSYS_REGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 6, camsys_devio_name_t)
245 #define CAMSYS_DEREGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 7, unsigned int)
246 #define CAMSYS_IRQCONNECT _IOW(CAMSYS_IOC_MAGIC, 8, camsys_irqcnnt_t)
247 #define CAMSYS_IRQWAIT _IOR(CAMSYS_IOC_MAGIC, 9, camsys_irqsta_t)
248 #define CAMSYS_IRQDISCONNECT _IOW(CAMSYS_IOC_MAGIC, 10, camsys_irqcnnt_t)
250 #define CAMSYS_QUREYMEM _IOR(CAMSYS_IOC_MAGIC, 11, camsys_querymem_t)