1 #ifndef __RKCAMSYS_HEAR_H__
2 #define __RKCAMSYS_HEAR_H__
4 #include <linux/ioctl.h>
7 * C A M S Y S H E A D F I L E V E R S I O N
12 * 1) modify camsys_irqcnnt_t;
14 * 1) add support cif phy for marvin;
16 * 1) add clock information in struct camsys_devio_name_s;
18 * 1) add pwren control
20 * 1) add support mipi phy configuration;
21 * 2) add support io domain and mclk driver strength configuration;
23 1) add flash_trigger_out control
27 1) add dev_name in struct camsys_devio_name_s;
29 1) support external flash IC
31 1) add CamSys_SensorBit0_CifBit4 in enum camsys_cifio_e.
33 #define CAMSYS_HEAD_VERSION KERNEL_VERSION(0,0xb,0)
35 #define CAMSYS_MARVIN_DEVNAME "camsys_marvin"
36 #define CAMSYS_CIF0_DEVNAME "camsys_cif0"
37 #define CAMSYS_CIF1_DEVNAME "camsys_cif1"
39 #define CAMSYS_NAME_LEN 32
41 #define CAMSYS_DEVID_MARVIN 0x00000001
42 #define CAMSYS_DEVID_CIF_0 0x00000002
43 #define CAMSYS_DEVID_CIF_1 0x00000004
44 #define CAMSYS_DEVID_INTERNAL 0x000000FF
46 #define CAMSYS_DEVID_SENSOR_1A 0x01000000
47 #define CAMSYS_DEVID_SENSOR_1B 0x02000000
48 #define CAMSYS_DEVID_SENSOR_2 0x04000000
49 #define CAMSYS_DEVID_EXTERNAL 0xFF000000
50 #define CAMSYS_DEVID_EXTERNAL_NUM 8
52 #define CAMSYS_DEVCFG_FLASHLIGHT 0x00000001
53 #define CAMSYS_DEVCFG_PREFLASHLIGHT 0x00000002
54 #define CAMSYS_DEVCFG_SHUTTER 0x00000004
56 typedef struct camsys_irqsta_s {
57 unsigned int ris; //Raw interrupt status
58 unsigned int mis; //Masked interrupt status
61 typedef struct camsys_irqcnnt_s {
63 unsigned int timeout; //us
69 typedef enum camsys_mmap_type_e { //this type can be filled in mmap offset argument
70 CamSys_Mmap_RegisterMem,
76 typedef struct camsys_querymem_s {
77 camsys_mmap_type_t mem_type;
78 unsigned long mem_offset;
80 unsigned int mem_size;
83 typedef struct camsys_i2c_info_s {
84 unsigned char bus_num;
85 unsigned short slave_addr;
86 unsigned int reg_addr; //i2c device register address
87 unsigned int reg_size; //register address size
89 unsigned int val_size; //register value size
90 unsigned int i2cbuf_directly;
91 unsigned int i2cbuf_bytes;
92 unsigned int speed; //100000 == 100KHz
95 typedef struct camsys_reginfo_s {
96 unsigned int dev_mask;
97 unsigned int reg_offset;
101 typedef enum camsys_sysctrl_ops_e {
103 CamSys_Vdd_Start_Tag,
110 CamSys_Gpio_Start_Tag,
118 CamSys_Clk_Start_Tag,
122 CamSys_Phy_Start_Tag,
125 CamSys_Flash_Trigger_Start_Tag,
126 CamSys_Flash_Trigger,
127 CamSys_Flash_Trigger_End_Tag,
130 } camsys_sysctrl_ops_t;
132 typedef struct camsys_regulator_info_s {
133 unsigned char name[CAMSYS_NAME_LEN];
136 } camsys_regulator_info_t;
138 typedef struct camsys_gpio_info_s {
139 unsigned char name[CAMSYS_NAME_LEN];
141 } camsys_gpio_info_t;
143 typedef struct camsys_iommu_s{
146 unsigned long linear_addr;
150 typedef struct camsys_sysctrl_s {
151 unsigned int dev_mask;
152 camsys_sysctrl_ops_t ops;
155 unsigned int rev[20];
158 typedef struct camsys_flash_info_s {
159 unsigned char fl_drv_name[CAMSYS_NAME_LEN];
160 camsys_gpio_info_t fl; //fl_trig
161 camsys_gpio_info_t fl_en;
162 } camsys_flash_info_t;
164 typedef struct camsys_mipiphy_s {
165 unsigned int data_en_bit; // data lane enable bit;
166 unsigned int bit_rate; // Mbps/lane
167 unsigned int phy_index; // phy0,phy1
170 typedef enum camsys_fmt_e {
171 CamSys_Fmt_Yuv420_8b = 0x18,
172 CamSys_Fmt_Yuv420_10b = 0x19,
173 CamSys_Fmt_LegacyYuv420_8b = 0x19,
175 CamSys_Fmt_Yuv422_8b = 0x1e,
176 CamSys_Fmt_Yuv422_10b = 0x1f,
178 CamSys_Fmt_Raw_6b = 0x28,
179 CamSys_Fmt_Raw_7b = 0x29,
180 CamSys_Fmt_Raw_8b = 0x2a,
181 CamSys_Fmt_Raw_10b = 0x2b,
182 CamSys_Fmt_Raw_12b = 0x2c,
183 CamSys_Fmt_Raw_14b = 0x2d,
186 typedef enum camsys_cifio_e {
187 CamSys_SensorBit0_CifBit0 = 0x00,
188 CamSys_SensorBit0_CifBit2 = 0x01,
189 CamSys_SensorBit0_CifBit4 = 0x02,
192 typedef struct camsys_cifphy_s {
193 unsigned int cif_num;
195 camsys_cifio_t cifio;
199 typedef enum camsys_phy_type_e {
206 typedef struct camsys_extdev_phy_s {
207 camsys_phy_type_t type;
209 camsys_mipiphy_t mipi;
213 } camsys_extdev_phy_t;
215 typedef struct camsys_extdev_clk_s {
216 unsigned int in_rate;
217 unsigned int driver_strength; //0 - 3
218 } camsys_extdev_clk_t;
220 typedef struct camsys_devio_name_s {
221 unsigned char dev_name[CAMSYS_NAME_LEN];
224 camsys_regulator_info_t avdd; // sensor avdd power regulator name
225 camsys_regulator_info_t dovdd; // sensor dovdd power regulator name
226 camsys_regulator_info_t dvdd; // sensor dvdd power regulator name "NC" describe no regulator
227 camsys_regulator_info_t afvdd;
229 camsys_gpio_info_t pwrdn; // standby gpio name
230 camsys_gpio_info_t rst; // hard reset gpio name
231 camsys_gpio_info_t afpwr; // auto focus vcm driver ic power gpio name
232 camsys_gpio_info_t afpwrdn; // auto focus vcm driver ic standby gpio
233 camsys_gpio_info_t pwren; // power enable gpio name
236 camsys_flash_info_t fl;
238 camsys_extdev_phy_t phy;
239 camsys_extdev_clk_t clk;
241 unsigned int dev_cfg; // function bit mask configuration
242 } camsys_devio_name_t;
244 typedef struct camsys_version_s {
245 unsigned int drv_ver;
246 unsigned int head_ver;
250 * I O C T L C O D E S F O R R O C K C H I P S C A M S Y S D E V I C E S
253 #define CAMSYS_IOC_MAGIC 'M'
254 #define CAMSYS_IOC_MAXNR 14
256 #define CAMSYS_VERCHK _IOR(CAMSYS_IOC_MAGIC, 0, camsys_version_t)
258 #define CAMSYS_I2CRD _IOWR(CAMSYS_IOC_MAGIC, 1, camsys_i2c_info_t)
259 #define CAMSYS_I2CWR _IOW(CAMSYS_IOC_MAGIC, 2, camsys_i2c_info_t)
261 #define CAMSYS_SYSCTRL _IOW(CAMSYS_IOC_MAGIC, 3, camsys_sysctrl_t)
262 #define CAMSYS_REGRD _IOWR(CAMSYS_IOC_MAGIC, 4, camsys_reginfo_t)
263 #define CAMSYS_REGWR _IOW(CAMSYS_IOC_MAGIC, 5, camsys_reginfo_t)
264 #define CAMSYS_REGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 6, camsys_devio_name_t)
265 #define CAMSYS_DEREGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 7, unsigned int)
266 #define CAMSYS_IRQCONNECT _IOW(CAMSYS_IOC_MAGIC, 8, camsys_irqcnnt_t)
267 #define CAMSYS_IRQWAIT _IOR(CAMSYS_IOC_MAGIC, 9, camsys_irqsta_t)
268 #define CAMSYS_IRQDISCONNECT _IOW(CAMSYS_IOC_MAGIC, 10, camsys_irqcnnt_t)
270 #define CAMSYS_QUREYMEM _IOR(CAMSYS_IOC_MAGIC, 11, camsys_querymem_t)
271 #define CAMSYS_QUREYIOMMU _IOW(CAMSYS_IOC_MAGIC, 12, int)