include/dt-bindings/display/rk_fb.h

   1 #ifndef _DT_BINDINGS_RKFB_H_
   2 #define _DT_BINDINGS_RKFB_H_
   3 #define GPIO            0
   4 #define REGULATOR       1
   5
   6 #define PRMRY           1               /*primary display device*/
   7 #define EXTEND          2               /*extend display device*/
   8
   9 #define DISPLAY_SOURCE_LCDC0    0
  10 #define DISPLAY_SOURCE_LCDC1    1
  11
  12 #define NO_DUAL         0
  13 #define ONE_DUAL        1
  14 #define DUAL            2
  15 #define DUAL_LCD        3
  16
  17 #define DEFAULT_MODE                    0
  18 #define ONE_VOP_DUAL_MIPI_HOR_SCAN      1
  19 #define ONE_VOP_DUAL_MIPI_VER_SCAN      2
  20 #define TWO_VOP_TWO_SCREEN              3
  21
  22 /********************************************************************
  23 **          display output interface supported by rockchip         **
  24 ********************************************************************/
  25 #define OUT_P888            0   //24bit screen,connect to lcdc D0~D23
  26 #define OUT_P666            1   //18bit screen,connect to lcdc D0~D17
  27 #define OUT_P565            2
  28 #define OUT_S888x           4
  29 #define OUT_CCIR656         6
  30 #define OUT_S888            8
  31 #define OUT_S888DUMY        12
  32 #define OUT_YUV_420         14
  33 #define OUT_P101010         15
  34 #define OUT_YUV_420_10BIT   16
  35 #define OUT_YUV_422         12
  36 #define OUT_YUV_422_10BIT   17
  37 #define OUT_P16BPP4         24
  38 #define OUT_D888_P666       0x21        //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
  39 #define OUT_D888_P565       0x22
  40
  41 #define SCREEN_NULL        0
  42 #define SCREEN_RGB         1
  43 #define SCREEN_LVDS        2
  44 #define SCREEN_DUAL_LVDS   3
  45 #define SCREEN_MCU         4
  46 #define SCREEN_TVOUT       5
  47 #define SCREEN_HDMI        6
  48 #define SCREEN_MIPI        7
  49 #define SCREEN_DUAL_MIPI   8
  50 #define SCREEN_EDP         9
  51 #define SCREEN_TVOUT_TEST  10
  52 #define SCREEN_LVDS_10BIT        11
  53 #define SCREEN_DUAL_LVDS_10BIT   12
  54 #define SCREEN_DP               13
  55
  56 #define LVDS_8BIT_1     0
  57 #define LVDS_8BIT_2     1
  58 #define LVDS_8BIT_3     2
  59 #define LVDS_6BIT       3
  60 #define LVDS_10BIT_1    4
  61 #define LVDS_10BIT_2    5
  62
  63 /* x y mirror or rotate mode */
  64 #define NO_MIRROR       0
  65 #define X_MIRROR        1 /* up-down flip*/
  66 #define Y_MIRROR        2 /* left-right flip */
  67 #define X_Y_MIRROR      3 /* the same as rotate 180 degrees */
  68 #define ROTATE_90       4 /* clockwise rotate 90 degrees */
  69 #define ROTATE_180      8 /* rotate 180 degrees
  70                            * It is recommended to use X_Y_MIRROR
  71                            * rather than ROTATE_180
  72                            */
  73 #define ROTATE_270      12/* clockwise rotate 270 degrees */
  74
  75 #define COLOR_RGB               0
  76 #define COLOR_RGB_BT2020        1
  77 /* default colorspace is bt601 */
  78 #define COLOR_YCBCR             2
  79 #define COLOR_YCBCR_BT709       3
  80 #define COLOR_YCBCR_BT2020      4
  81
  82 #define IS_YUV_COLOR(x)                ((x) >= COLOR_YCBCR)
  83
  84 /* fb win map */
  85 #define FB_DEFAULT_ORDER                0
  86 #define FB0_WIN2_FB1_WIN1_FB2_WIN0      12
  87 #define FB0_WIN1_FB1_WIN2_FB2_WIN0      21
  88 #define FB0_WIN2_FB1_WIN0_FB2_WIN1      102
  89 #define FB0_WIN0_FB1_WIN2_FB2_WIN1      120
  90 #define FB0_WIN0_FB1_WIN1_FB2_WIN2      210
  91 #define FB0_WIN1_FB1_WIN0_FB2_WIN2      201
  92 #define FB0_WIN0_FB1_WIN1_FB2_WIN2_FB3_WIN3         3210
  93 #define FB0_WIN0_FB1_WIN1_FB2_WIN2_FB3_WIN3_FB4_HWC 43210
  94
  95 #define DISPLAY_POLICY_SDK      0
  96 #define DISPLAY_POLICY_BOX      1
  97
  98 /*              lvds connect config
  99  *
 100  *              LVDS_8BIT_1    LVDS_8BIT_2     LVDS_8BIT_3     LVDS_6BIT
 101 ----------------------------------------------------------------------
 102         TX0     R0              R2              R2              R0
 103         TX1     R1              R3              R3              R1
 104         TX2     R2              R4              R4              R2
 105 Y       TX3     R3              R5              R5              R3
 106 0       TX4     R4              R6              R6              R4
 107         TX6     R5              R7              R7              R5
 108         TX7     G0              G2              G2              G0
 109 ----------------------------------------------------------------------
 110         TX8     G1              G3              G3              G1
 111         TX9     G2              G4              G4              G2
 112 Y       TX12    G3              G5              G5              G3
 113 1       TX13    G4              G6              G6              G4
 114         TX14    G5              G7              G7              G5
 115         TX15    B0              B2              B2              B0
 116         TX18    B1              B3              B3              B1
 117 ----------------------------------------------------------------------
 118         TX19    B2              B4              B4              B2
 119         TX20    B3              B5              B5              B3
 120         TX21    B4              B6              B6              B4
 121 Y       TX22    B5              B7              B7              B5
 122 2       TX24    HSYNC           HSYNC           HSYNC           HSYNC
 123         TX25    VSYNC           VSYNC           VSYNC           VSYNC
 124         TX26    ENABLE          ENABLE          ENABLE          ENABLE
 125 ----------------------------------------------------------------------
 126         TX27    R6              R0              GND             GND
 127         TX5     R7              R1              GND             GND
 128         TX10    G6              G0              GND             GND
 129 Y       TX11    G7              G1              GND             GND
 130 3       TX16    B6              B0              GND             GND
 131         TX17    B7              B1              GND             GND
 132         TX23    RSVD            RSVD            RSVD            RSVD
 133 ----------------------------------------------------------------------
 134
 135  *              LVDS_10BIT_1    LVDS_10BIT_2
 136 ----------------------------------------------------------------------
 137         TX0     R0              R4
 138         TX1     R1              R5
 139         TX2     R2              R6
 140 Y       TX3     R3              R7
 141 0       TX4     R4              R8
 142         TX6     R5              R9
 143         TX7     G0              G4
 144 ----------------------------------------------------------------------
 145         TX8     G1              G5
 146         TX9     G2              G6
 147 Y       TX12    G3              G7
 148 1       TX13    G4              G8
 149         TX14    G5              G9
 150         TX15    B0              B4
 151         TX18    B1              B5
 152 ----------------------------------------------------------------------
 153         TX19    B2              B6
 154         TX20    B3              B7
 155         TX21    B4              B8
 156 Y       TX22    B5              B9
 157 2       TX24    HSYNC           HSYNC
 158         TX25    VSYNC           VSYNC
 159         TX26    ENABLE          ENABLE
 160 ----------------------------------------------------------------------
 161         TX27    R6              R2
 162         TX5     R7              R3
 163         TX10    G6              G2
 164 Y       TX11    G7              G3
 165 3       TX16    B6              B2
 166         TX17    B7              B3
 167         TX23    GND             GND
 168 ----------------------------------------------------------------------
 169         TX27    R8              R0
 170         TX5     R9              R1
 171         TX10    G8              G0
 172 Y       TX11    G9              G1
 173 4       TX16    B8              B0
 174         TX17    B9              B1
 175         TX23    GND             GND
 176 ------------------------------------------------------------------------
 177 */
 178
 179 #endif