rockchip: add reset-rockchip driver to support Generic Reset Controller framework
[firefly-linux-kernel-4.4.55.git] / include / dt-bindings / clock / rockchip,rk3288.h
1 #ifndef _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H
2 #define _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H
3
4 #include "rockchip.h"
5
6 /* pll id */
7 #define RK3288_APLL_ID          0
8 #define RK3288_DPLL_ID          1
9 #define RK3288_CPLL_ID          2
10 #define RK3288_GPLL_ID          3
11 #define RK3288_NPLL_ID          4
12 #define RK3288_END_PLL_ID       5
13
14 /* reset id */
15 #define RK3288_SOFT_RST_CORE0                   0
16 #define RK3288_SOFT_RST_CORE1                   1
17 #define RK3288_SOFT_RST_CORE2                   2
18 #define RK3288_SOFT_RST_CORE3                   3
19 #define RK3288_SOFT_RST_CORE0_PO                4
20 #define RK3288_SOFT_RST_CORE1_PO                5
21 #define RK3288_SOFT_RST_CORE2_PO                6
22 #define RK3288_SOFT_RST_CORE3_PO                7
23 #define RK3288_SOFT_RST_PD_CORE_STR_SYS_A       8
24 #define RK3288_SOFT_RST_PD_BUS_STR_SYS_A        9
25 #define RK3288_SOFT_RST_L2C                     10
26 #define RK3288_SOFT_RST_TOPDBG                  11
27 #define RK3288_SOFT_RST_CORE0_DBG               12
28 #define RK3288_SOFT_RST_CORE1_DBG               13
29 #define RK3288_SOFT_RST_CORE2_DBG               14
30 #define RK3288_SOFT_RST_CORE3_DBG               15
31
32 #define RK3288_SOFT_RST_PD_BUS_AHB_ARBITOR      16
33 #define RK3288_SOFT_RST_EFUSE_256BIT_P          17
34 #define RK3288_SOFT_RST_DMA1                    18
35 #define RK3288_SOFT_RST_INTMEM                  19
36 #define RK3288_SOFT_RST_ROM                     20
37 #define RK3288_SOFT_RST_SPDIF_8CH               21
38 #define RK3288_SOFT_RST_TIMER_P                 22
39 #define RK3288_SOFT_RST_I2S                     23
40 #define RK3288_SOFT_RST_SPDIF                   24
41 #define RK3288_SOFT_RST_TIMER0                  25
42 #define RK3288_SOFT_RST_TIMER1                  26
43 #define RK3288_SOFT_RST_TIMER2                  27
44 #define RK3288_SOFT_RST_TIMER3                  28
45 #define RK3288_SOFT_RST_TIMER4                  29
46 #define RK3288_SOFT_RST_TIMER5                  30
47 #define RK3288_SOFT_RST_EFUSE_P                 31
48
49 #define RK3288_SOFT_RST_GPIO0                   32
50 #define RK3288_SOFT_RST_GPIO1                   33
51 #define RK3288_SOFT_RST_GPIO2                   34
52 #define RK3288_SOFT_RST_GPIO3                   35
53 #define RK3288_SOFT_RST_GPIO4                   36
54 #define RK3288_SOFT_RST_GPIO5                   37
55 #define RK3288_SOFT_RST_GPIO6                   38
56 #define RK3288_SOFT_RST_GPIO7                   39
57 #define RK3288_SOFT_RST_GPIO8                   40
58 #define RK3288_SOFT_RST_2RES9                   41
59 #define RK3288_SOFT_RST_I2C0                    42
60 #define RK3288_SOFT_RST_I2C1                    43
61 #define RK3288_SOFT_RST_I2C2                    44
62 #define RK3288_SOFT_RST_I2C3                    45
63 #define RK3288_SOFT_RST_I2C4                    46
64 #define RK3288_SOFT_RST_I2C5                    47
65
66 #define RK3288_SOFT_RST_DW_PWM                  48
67 #define RK3288_SOFT_RST_MMC_PERI                49
68 #define RK3288_SOFT_RST_PERIPH_MMU              50
69 #define RK3288_SOFT_RST_DAP                     51
70 #define RK3288_SOFT_RST_DAP_SYS                 52
71 #define RK3288_SOFT_RST_TPIU_AT                 53
72 #define RK3288_SOFT_RST_PMU_P                   54
73 #define RK3288_SOFT_RST_GRF                     55
74 #define RK3288_SOFT_RST_PMU                     56
75 #define RK3288_SOFT_RST_PERIPHSYS_A             57
76 #define RK3288_SOFT_RST_PERIPHSYS_H             58
77 #define RK3288_SOFT_RST_PERIPHSYS_P             59
78 #define RK3288_SOFT_RST_PERIPH_NIU              60
79 #define RK3288_SOFT_RST_PD_PERI_AHB_ARBITOR     61
80 #define RK3288_SOFT_RST_EMEM_PERI               62
81 #define RK3288_SOFT_RST_USB_PERI                63
82
83 #define RK3288_SOFT_RST_DMA2                    64
84 #define RK3288_SOFT_RST_4RES1                   65
85 #define RK3288_SOFT_RST_MAC                     66
86 #define RK3288_SOFT_RST_GPS                     67
87 #define RK3288_SOFT_RST_4RES4                   68
88 #define RK3288_SOFT_RST_RK_PWM                  69
89 #define RK3288_SOFT_RST_4RES6                   70
90 #define RK3288_SOFT_RST_CCP                     71
91 #define RK3288_SOFT_RST_USB_HOST0               72
92 #define RK3288_SOFT_RST_HSIC                    73
93 #define RK3288_SOFT_RST_HSIC_AUX                74
94 #define RK3288_SOFT_RST_HSICPHY                 75
95 #define RK3288_SOFT_RST_HSADC                   76
96 #define RK3288_SOFT_RST_NANDC0                  77
97 #define RK3288_SOFT_RST_NANDC1                  78
98 #define RK3288_SOFT_RST_4RES15                  79
99
100 #define RK3288_SOFT_RST_TZPC                    80
101 #define RK3288_SOFT_RST_5RES1                   81
102 #define RK3288_SOFT_RST_5RES2                   82
103 #define RK3288_SOFT_RST_SPI0                    83
104 #define RK3288_SOFT_RST_SPI1                    84
105 #define RK3288_SOFT_RST_SPI2                    85
106 #define RK3288_SOFT_RST_5RES6                   86
107 #define RK3288_SOFT_RST_SARADC                  87
108 #define RK3288_SOFT_RST_PD_ALIVE_NIU_P          88
109 #define RK3288_SOFT_RST_PD_PMU_INTMEM_P         89
110 #define RK3288_SOFT_RST_PD_PMU_NIU_P            90
111 #define RK3288_SOFT_RST_SECURITY_GRF_P          91
112 #define RK3288_SOFT_RST_5RES12                  92
113 #define RK3288_SOFT_RST_5RES13                  93
114 #define RK3288_SOFT_RST_5RES14                  94
115 #define RK3288_SOFT_RST_5RES15                  95
116
117 #define RK3288_SOFT_RST_VIO_ARBI_H              96
118 #define RK3288_SOFT_RST_RGA_NIU_A               97
119 #define RK3288_SOFT_RST_VIO0_NIU_A              98
120 #define RK3288_SOFT_RST_VIO_NIU_H               99
121 #define RK3288_SOFT_RST_LCDC0_A                 100
122 #define RK3288_SOFT_RST_LCDC0_H                 101
123 #define RK3288_SOFT_RST_LCDC0_D                 102
124 #define RK3288_SOFT_RST_VIO1_NIU_A              103
125 #define RK3288_SOFT_RST_VIP                     104
126 #define RK3288_SOFT_RST_RGA_CORE                105
127 #define RK3288_SOFT_RST_IEP_A                   106
128 #define RK3288_SOFT_RST_IEP_H                   107
129 #define RK3288_SOFT_RST_RGA_A                   108
130 #define RK3288_SOFT_RST_RGA_H                   109
131 #define RK3288_SOFT_RST_ISP                     110
132 #define RK3288_SOFT_RST_EDP                     111
133
134 #define RK3288_SOFT_RST_VCODEC_A                112
135 #define RK3288_SOFT_RST_VCODEC_H                113
136 #define RK3288_SOFT_RST_VIO_H2P_H               114
137 #define RK3288_SOFT_RST_MIPIDSI0_P              115
138 #define RK3288_SOFT_RST_MIPIDSI1_P              116
139 #define RK3288_SOFT_RST_MIPICSI_P               117
140 #define RK3288_SOFT_RST_LVDS_PHY_P              118
141 #define RK3288_SOFT_RST_LVDS_CON                119
142 #define RK3288_SOFT_RST_GPU                     120
143 #define RK3288_SOFT_RST_HDMI                    121
144 #define RK3288_SOFT_RST_7RES10                  122
145 #define RK3288_SOFT_RST_7RES11                  123
146 #define RK3288_SOFT_RST_CORE_PVTM               124
147 #define RK3288_SOFT_RST_GPU_PVTM                125
148 #define RK3288_SOFT_RST_7RES14                  126
149 #define RK3288_SOFT_RST_7RES15                  127
150
151 #define RK3288_SOFT_RST_MMC0                    128
152 #define RK3288_SOFT_RST_SDIO0                   129
153 #define RK3288_SOFT_RST_SDIO1                   130
154 #define RK3288_SOFT_RST_EMMC                    131
155 #define RK3288_SOFT_RST_USBOTG_H                132
156 #define RK3288_SOFT_RST_USBOTGPHY               133
157 #define RK3288_SOFT_RST_USBOTGC                 134
158 #define RK3288_SOFT_RST_USBHOST0_H              135
159 #define RK3288_SOFT_RST_USBHOST0PHY             136
160 #define RK3288_SOFT_RST_USBHOST0C               137
161 #define RK3288_SOFT_RST_USBHOST1_H              138
162 #define RK3288_SOFT_RST_USBHOST1PHY             139
163 #define RK3288_SOFT_RST_USBHOST1C               140
164 #define RK3288_SOFT_RST_USB_ADP                 141
165 #define RK3288_SOFT_RST_ACC_EFUSE               142
166 #define RK3288_SOFT_RST_8RES15                  143
167
168 #define RK3288_SOFT_RST_CORESIGHT               144
169 #define RK3288_SOFT_RST_PD_CORE_AHB_NOC         145
170 #define RK3288_SOFT_RST_PD_CORE_APB_NOC         146
171 #define RK3288_SOFT_RST_PD_CORE_MP_AXI          147
172 #define RK3288_SOFT_RST_GIC                     148
173 #define RK3288_SOFT_RST_LCDCPWM0                149
174 #define RK3288_SOFT_RST_LCDCPWM1                150
175 #define RK3288_SOFT_RST_VIO0_H2P_BRG            151
176 #define RK3288_SOFT_RST_VIO1_H2P_BRG            152
177 #define RK3288_SOFT_RST_RGA_H2P_BRG             153
178 #define RK3288_SOFT_RST_HEVC                    154
179 #define RK3288_SOFT_RST_9RES11                  155
180 #define RK3288_SOFT_RST_9RES12                  156
181 #define RK3288_SOFT_RST_9RES13                  157
182 #define RK3288_SOFT_RST_9RES14                  158
183 #define RK3288_SOFT_RST_TSADC_P                 159
184
185 #define RK3288_SOFT_RST_DDRPHY0                 160
186 #define RK3288_SOFT_RST_DDRPHY0_P               161
187 #define RK3288_SOFT_RST_DDRCTRL0                162
188 #define RK3288_SOFT_RST_DDRCTRL0_P              163
189 #define RK3288_SOFT_RST_DDRPHY0_CTL             164
190 #define RK3288_SOFT_RST_DDRPHY1                 165
191 #define RK3288_SOFT_RST_DDRPHY1_P               166
192 #define RK3288_SOFT_RST_DDRCTRL1                167
193 #define RK3288_SOFT_RST_DDRCTRL1_P              168
194 #define RK3288_SOFT_RST_DDRPHY1_CTL             169
195 #define RK3288_SOFT_RST_DDRMSCH0                170
196 #define RK3288_SOFT_RST_DDRMSCH1                171
197 #define RK3288_SOFT_RST_10RES12                 172
198 #define RK3288_SOFT_RST_10RES13                 173
199 #define RK3288_SOFT_RST_CRYPTO                  174
200 #define RK3288_SOFT_RST_C2C_HOST                175
201
202 #define RK3288_SOFT_RST_LCDC1_A                 176
203 #define RK3288_SOFT_RST_LCDC1_H                 177
204 #define RK3288_SOFT_RST_LCDC1_D                 178
205 #define RK3288_SOFT_RST_UART0                   179
206 #define RK3288_SOFT_RST_UART1                   180
207 #define RK3288_SOFT_RST_UART2                   181
208 #define RK3288_SOFT_RST_UART3                   182
209 #define RK3288_SOFT_RST_UART4                   183
210 #define RK3288_SOFT_RST_11RES8                  184
211 #define RK3288_SOFT_RST_11RES9                  185
212 #define RK3288_SOFT_RST_SIMC                    186
213 #define RK3288_SOFT_RST_PS2C                    187
214 #define RK3288_SOFT_RST_TSP                     188
215 #define RK3288_SOFT_RST_TSP_CLKIN0              189
216 #define RK3288_SOFT_RST_TSP_CLKIN1              190
217 #define RK3288_SOFT_RST_TSP_27M                 191
218
219
220 #endif /* _DT_BINDINGS_CLOCK_ROCKCHIP_RK3288_H */