3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
\r
7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
\r
9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
\r
11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
\r
15 #include <linux/memory.h>
\r
16 #include <linux/dma-mapping.h>
\r
17 #include <linux/scatterlist.h>
\r
18 #include <asm/memory.h>
\r
19 #include <asm/atomic.h>
\r
20 #include <asm/cacheflush.h>
\r
21 #include "rga2_mmu_info.h"
\r
23 extern struct rga2_service_info rga2_service;
\r
24 extern struct rga2_mmu_buf_t rga2_mmu_buf;
\r
26 //extern int mmu_buff_temp[1024];
\r
28 #define KERNEL_SPACE_VALID 0xc0000000
\r
30 #define V7_VATOPA_SUCESS_MASK (0x1)
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31 #define V7_VATOPA_GET_PADDR(X) (X & 0xFFFFF000)
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32 #define V7_VATOPA_GET_INER(X) ((X>>4) & 7)
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33 #define V7_VATOPA_GET_OUTER(X) ((X>>2) & 3)
\r
34 #define V7_VATOPA_GET_SH(X) ((X>>7) & 1)
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35 #define V7_VATOPA_GET_NS(X) ((X>>9) & 1)
\r
36 #define V7_VATOPA_GET_SS(X) ((X>>1) & 1)
\r
39 static unsigned int armv7_va_to_pa(unsigned int v_addr)
\r
41 unsigned int p_addr;
\r
42 __asm__ volatile ( "mcr p15, 0, %1, c7, c8, 0\n"
\r
45 "mrc p15, 0, %0, c7, c4, 0\n"
\r
50 if (p_addr & V7_VATOPA_SUCESS_MASK)
\r
53 return (V7_VATOPA_GET_SS(p_addr) ? 0xFFFFFFFF : V7_VATOPA_GET_PADDR(p_addr));
\r
57 static int rga2_mmu_buf_get(struct rga2_mmu_buf_t *t, uint32_t size)
\r
59 mutex_lock(&rga2_service.lock);
\r
61 mutex_unlock(&rga2_service.lock);
\r
66 static int rga2_mmu_buf_get_try(struct rga2_mmu_buf_t *t, uint32_t size)
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68 mutex_lock(&rga2_service.lock);
\r
69 if((t->back - t->front) > t->size) {
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70 if(t->front + size > t->back - t->size)
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74 if((t->front + size) > t->back)
\r
77 if(t->front + size > t->size) {
\r
78 if (size > (t->back - t->size)) {
\r
84 mutex_unlock(&rga2_service.lock);
\r
90 static int rga2_mmu_buf_cal(struct rga2_mmu_buf_t *t, uint32_t size)
\r
92 if((t->front + size) > t->back) {
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103 static int rga2_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr)
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105 uint32_t start, end;
\r
106 uint32_t pageCount;
\r
108 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
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109 start = Mem >> PAGE_SHIFT;
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110 pageCount = end - start;
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111 *StartAddr = start;
\r
115 static int rga2_buf_size_cal(uint32_t yrgb_addr, uint32_t uv_addr, uint32_t v_addr,
\r
116 int format, uint32_t w, uint32_t h, uint32_t *StartAddr )
\r
118 uint32_t size_yrgb = 0;
\r
119 uint32_t size_uv = 0;
\r
120 uint32_t size_v = 0;
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121 uint32_t stride = 0;
\r
122 uint32_t start, end;
\r
123 uint32_t pageCount;
\r
127 case RGA2_FORMAT_RGBA_8888 :
\r
128 stride = (w * 4 + 3) & (~3);
\r
129 size_yrgb = stride*h;
\r
130 start = yrgb_addr >> PAGE_SHIFT;
\r
131 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
133 case RGA2_FORMAT_RGBX_8888 :
\r
134 stride = (w * 4 + 3) & (~3);
\r
135 size_yrgb = stride*h;
\r
136 start = yrgb_addr >> PAGE_SHIFT;
\r
137 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
139 case RGA2_FORMAT_RGB_888 :
\r
140 stride = (w * 3 + 3) & (~3);
\r
141 size_yrgb = stride*h;
\r
142 start = yrgb_addr >> PAGE_SHIFT;
\r
143 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
145 case RGA2_FORMAT_BGRA_8888 :
\r
147 start = yrgb_addr >> PAGE_SHIFT;
\r
148 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
150 case RGA2_FORMAT_RGB_565 :
\r
151 stride = (w*2 + 3) & (~3);
\r
152 size_yrgb = stride * h;
\r
153 start = yrgb_addr >> PAGE_SHIFT;
\r
154 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
156 case RGA2_FORMAT_RGBA_5551 :
\r
157 stride = (w*2 + 3) & (~3);
\r
158 size_yrgb = stride * h;
\r
159 start = yrgb_addr >> PAGE_SHIFT;
\r
160 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
162 case RGA2_FORMAT_RGBA_4444 :
\r
163 stride = (w*2 + 3) & (~3);
\r
164 size_yrgb = stride * h;
\r
165 start = yrgb_addr >> PAGE_SHIFT;
\r
166 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
168 case RGA2_FORMAT_BGR_888 :
\r
169 stride = (w*3 + 3) & (~3);
\r
170 size_yrgb = stride * h;
\r
171 start = yrgb_addr >> PAGE_SHIFT;
\r
172 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
176 case RGA2_FORMAT_YCbCr_422_SP :
\r
177 case RGA2_FORMAT_YCrCb_422_SP :
\r
178 stride = (w + 3) & (~3);
\r
179 size_yrgb = stride * h;
\r
180 size_uv = stride * h;
\r
181 start = MIN(yrgb_addr, uv_addr);
\r
182 start >>= PAGE_SHIFT;
\r
183 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
184 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
185 pageCount = end - start;
\r
187 case RGA2_FORMAT_YCbCr_422_P :
\r
188 case RGA2_FORMAT_YCrCb_422_P :
\r
189 stride = (w + 3) & (~3);
\r
190 size_yrgb = stride * h;
\r
191 size_uv = ((stride >> 1) * h);
\r
192 size_v = ((stride >> 1) * h);
\r
193 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
194 start = start >> PAGE_SHIFT;
\r
195 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
196 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
197 pageCount = end - start;
\r
199 case RGA2_FORMAT_YCbCr_420_SP :
\r
200 case RGA2_FORMAT_YCrCb_420_SP :
\r
201 stride = (w + 3) & (~3);
\r
202 size_yrgb = stride * h;
\r
203 size_uv = (stride * (h >> 1));
\r
204 start = MIN(yrgb_addr, uv_addr);
\r
205 start >>= PAGE_SHIFT;
\r
206 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
207 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
208 pageCount = end - start;
\r
209 //printk("yrgb_addr = %.8x\n", yrgb_addr);
\r
210 //printk("uv_addr = %.8x\n", uv_addr);
\r
212 case RGA2_FORMAT_YCbCr_420_P :
\r
213 case RGA2_FORMAT_YCrCb_420_P :
\r
214 stride = (w + 3) & (~3);
\r
215 size_yrgb = stride * h;
\r
216 size_uv = ((stride >> 1) * (h >> 1));
\r
217 size_v = ((stride >> 1) * (h >> 1));
\r
218 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
219 start >>= PAGE_SHIFT;
\r
220 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
221 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
222 pageCount = end - start;
\r
225 case RK_FORMAT_BPP1 :
\r
227 case RK_FORMAT_BPP2 :
\r
229 case RK_FORMAT_BPP4 :
\r
231 case RK_FORMAT_BPP8 :
\r
240 *StartAddr = start;
\r
244 static int rga2_MapUserMemory(struct page **pages,
\r
245 uint32_t *pageTable,
\r
247 uint32_t pageCount)
\r
260 down_read(¤t->mm->mmap_sem);
\r
261 result = get_user_pages(current,
\r
263 Memory << PAGE_SHIFT,
\r
270 up_read(¤t->mm->mmap_sem);
\r
273 if(result <= 0 || result < pageCount)
\r
277 for(i=0; i<pageCount; i++)
\r
279 temp = armv7_va_to_pa((Memory + i) << PAGE_SHIFT);
\r
280 if (temp == 0xffffffff)
\r
282 printk("rga find mmu phy ddr error\n ");
\r
283 status = RGA_OUT_OF_RESOURCES;
\r
287 pageTable[i] = temp;
\r
293 if(result <= 0 || result < pageCount)
\r
295 struct vm_area_struct *vma;
\r
297 for(i=0; i<pageCount; i++)
\r
299 vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);
\r
301 if (vma)//&& (vma->vm_flags & VM_PFNMAP) )
\r
312 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
314 if(pgd_val(*pgd) == 0)
\r
316 //printk("rga pgd value is zero \n");
\r
320 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
323 pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
326 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
329 pte_unmap_unlock(pte, ptl);
\r
343 pfn = pte_pfn(*pte);
\r
344 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
345 pte_unmap_unlock(pte, ptl);
\r
359 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
360 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
361 pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
362 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
364 pfn = pte_pfn(*pte);
\r
365 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
366 pte_unmap_unlock(pte, ptl);
\r
371 pageTable[i] = Address;
\r
375 status = RGA2_OUT_OF_RESOURCES;
\r
384 /* Fill the page table. */
\r
385 for(i=0; i<pageCount; i++)
\r
387 /* Get the physical address from page struct. */
\r
388 pageTable[i] = page_to_phys(pages[i]);
\r
398 static int rga2_MapION(struct sg_table *sg,
\r
405 uint32_t mapped_size = 0;
\r
407 struct scatterlist *sgl = sg->sgl;
\r
408 uint32_t sg_num = 0;
\r
412 //printk("pageCount=%d\n", pageCount);
\r
414 len = sg_dma_len(sgl) >> PAGE_SHIFT;
\r
415 Address = sg_phys(sgl);
\r
416 //printk("len = %d\n", len);
\r
417 //printk("Address = %.8x\n", Address);
\r
418 for(i=0; i<len; i++) {
\r
419 Memory[mapped_size + i] = Address + (i << PAGE_SHIFT);
\r
422 //printk("mapped_size = %d\n", mapped_size);
\r
423 mapped_size += len;
\r
426 while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));
\r
432 static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
434 int Src0MemSize, DstMemSize, Src1MemSize;
\r
435 uint32_t Src0Start, Src1Start, DstStart;
\r
437 uint32_t *MMU_Base, *MMU_Base_phys;
\r
440 uint32_t uv_size, v_size;
\r
442 struct page **pages = NULL;
\r
452 /* cal src0 buf mmu info */
\r
453 if(req->mmu_info.src0_mmu_flag & 1) {
\r
454 Src0MemSize = rga2_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
455 req->src.format, req->src.vir_w,
\r
458 if (Src0MemSize == 0) {
\r
463 /* cal src1 buf mmu info */
\r
464 if(req->mmu_info.src1_mmu_flag & 1) {
\r
465 Src1MemSize = rga2_buf_size_cal(req->src1.yrgb_addr, req->src1.uv_addr, req->src1.v_addr,
\r
466 req->src1.format, req->src1.vir_w,
\r
469 Src0MemSize = (Src0MemSize + 3) & (~3);
\r
470 if (Src1MemSize == 0) {
\r
476 /* cal dst buf mmu info */
\r
477 if(req->mmu_info.dst_mmu_flag & 1) {
\r
478 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
479 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
481 if(DstMemSize == 0) {
\r
486 /* Cal out the needed mem size */
\r
487 Src0MemSize = (Src0MemSize+15)&(~15);
\r
488 Src1MemSize = (Src1MemSize+15)&(~15);
\r
489 DstMemSize = (DstMemSize+15)&(~15);
\r
490 AllSize = Src0MemSize + Src1MemSize + DstMemSize;
\r
492 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
493 pr_err("RGA2 Get MMU mem failed\n");
\r
494 status = RGA2_MALLOC_ERROR;
\r
498 pages = kzalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);
\r
499 if(pages == NULL) {
\r
500 pr_err("RGA MMU malloc pages mem failed\n");
\r
501 status = RGA2_MALLOC_ERROR;
\r
505 mutex_lock(&rga2_service.lock);
\r
506 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
507 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
508 mutex_unlock(&rga2_service.lock);
\r
510 if (req->sg_src0) {
\r
511 ret = rga2_MapION(req->sg_src0, &MMU_Base[0], Src0MemSize);
\r
514 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], Src0Start, Src0MemSize);
\r
518 pr_err("rga2 map src0 memory failed\n");
\r
519 pr_err("RGA2 : yrgb = %.8x, uv = %.8x format = %d\n", req->src.yrgb_addr, req->src.uv_addr, req->src.format);
\r
520 pr_err("RGA2 : vir_w = %d, vir_h = %d\n", req->src.vir_w, req->src.vir_h);
\r
525 /* change the buf address in req struct */
\r
526 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys));
\r
527 uv_size = (req->src.uv_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
528 v_size = (req->src.v_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
530 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
531 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);
\r
532 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);
\r
536 if (req->sg_src1) {
\r
537 ret = rga2_MapION(req->sg_src1, MMU_Base + Src0MemSize, Src1MemSize);
\r
540 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize, Src1Start, Src1MemSize);
\r
544 pr_err("rga2 map src1 memory failed\n");
\r
545 pr_err("RGA2 : yrgb = %.8x, format = %d\n", req->src1.yrgb_addr, req->src1.format);
\r
546 pr_err("RGA2 : vir_w = %d, vir_h = %d\n", req->src1.vir_w, req->src1.vir_h);
\r
551 /* change the buf address in req struct */
\r
552 req->mmu_info.src1_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize));
\r
553 req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
558 ret = rga2_MapION(req->sg_dst, MMU_Base + Src0MemSize + Src1MemSize, DstMemSize);
\r
561 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize + Src1MemSize, DstStart, DstMemSize);
\r
564 pr_err("rga2 map dst memory failed\n");
\r
565 pr_err("RGA2 : yrgb = %.8x, uv = %.8x\n, format = %d\n", req->dst.yrgb_addr, req->dst.uv_addr, req->dst.format);
\r
566 pr_err("RGA2 : vir_w = %d, vir_h = %d\n", req->dst.vir_w, req->dst.vir_h);
\r
571 /* change the buf address in req struct */
\r
572 req->mmu_info.dst_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize + Src1MemSize));
\r
573 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
574 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
575 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
576 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((uv_size) << PAGE_SHIFT);
\r
577 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((v_size) << PAGE_SHIFT);
\r
580 /* flush data to DDR */
\r
581 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
582 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
584 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
585 reg->MMU_len = AllSize;
\r
589 /* Free the page table */
\r
590 if (pages != NULL) {
\r
599 /* Free the page table */
\r
600 if (pages != NULL) {
\r
607 static int rga2_mmu_info_color_palette_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
609 int SrcMemSize, DstMemSize;
\r
610 uint32_t SrcStart, DstStart;
\r
611 struct page **pages = NULL;
\r
613 uint32_t *MMU_Base = NULL, *MMU_Base_phys;
\r
618 uint16_t sw, byte_num;
\r
620 shift = 3 - (req->palette_mode & 3);
\r
621 sw = req->src.vir_w*req->src.vir_h;
\r
622 byte_num = sw >> shift;
\r
623 stride = (byte_num + 3) & (~3);
\r
630 if (req->mmu_info.src0_mmu_flag) {
\r
631 SrcMemSize = rga2_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
632 if(SrcMemSize == 0) {
\r
637 if (req->mmu_info.dst_mmu_flag) {
\r
638 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
639 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
641 if(DstMemSize == 0) {
\r
646 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
647 DstMemSize = (DstMemSize + 15) & (~15);
\r
649 AllSize = SrcMemSize + DstMemSize;
\r
651 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
652 pr_err("RGA2 Get MMU mem failed\n");
\r
653 status = RGA2_MALLOC_ERROR;
\r
657 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
658 if(pages == NULL) {
\r
659 pr_err("RGA MMU malloc pages mem failed\n");
\r
663 mutex_lock(&rga2_service.lock);
\r
664 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
665 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
666 mutex_unlock(&rga2_service.lock);
\r
669 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
671 pr_err("rga2 map src0 memory failed\n");
\r
676 /* change the buf address in req struct */
\r
677 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys));
\r
678 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
682 ret = rga2_MapUserMemory(&pages[0], MMU_Base + SrcMemSize, DstStart, DstMemSize);
\r
684 pr_err("rga2 map dst memory failed\n");
\r
689 /* change the buf address in req struct */
\r
690 req->mmu_info.dst_base_addr = ((uint32_t)(MMU_Base_phys + SrcMemSize));
\r
691 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
694 /* flush data to DDR */
\r
695 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
696 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
698 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
699 reg->MMU_len = AllSize;
\r
703 /* Free the page table */
\r
704 if (pages != NULL) {
\r
712 /* Free the page table */
\r
713 if (pages != NULL) {
\r
720 static int rga2_mmu_info_color_fill_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
724 struct page **pages = NULL;
\r
726 uint32_t *MMU_Base, *MMU_Base_phys;
\r
734 if(req->mmu_info.dst_mmu_flag & 1) {
\r
735 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
736 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
738 if(DstMemSize == 0) {
\r
743 AllSize = (DstMemSize + 3) & (~3);
\r
745 pages = kzalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);
\r
746 if(pages == NULL) {
\r
747 pr_err("RGA2 MMU malloc pages mem failed\n");
\r
748 status = RGA2_MALLOC_ERROR;
\r
752 if(rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
753 pr_err("RGA2 Get MMU mem failed\n");
\r
754 status = RGA2_MALLOC_ERROR;
\r
758 mutex_lock(&rga2_service.lock);
\r
759 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
760 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
761 mutex_unlock(&rga2_service.lock);
\r
765 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], DstStart, DstMemSize);
\r
767 pr_err("rga2 map dst memory failed\n");
\r
772 /* change the buf address in req struct */
\r
773 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys)>>4);
\r
774 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
777 /* flush data to DDR */
\r
778 dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
779 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
\r
781 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
783 /* Free the page table */
\r
798 static int rga2_mmu_info_update_palette_table_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
802 struct page **pages = NULL;
\r
804 uint32_t *MMU_Base, *MMU_Base_phys;
\r
811 /* cal src buf mmu info */
\r
812 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h, &SrcStart);
\r
813 if(SrcMemSize == 0) {
\r
817 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
818 AllSize = SrcMemSize;
\r
820 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
821 pr_err("RGA2 Get MMU mem failed\n");
\r
822 status = RGA2_MALLOC_ERROR;
\r
826 mutex_lock(&rga2_service.lock);
\r
827 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
828 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
829 mutex_unlock(&rga2_service.lock);
\r
831 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
832 if(pages == NULL) {
\r
833 pr_err("RGA MMU malloc pages mem failed\n");
\r
834 status = RGA2_MALLOC_ERROR;
\r
839 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
841 pr_err("rga2 map palette memory failed\n");
\r
846 /* change the buf address in req struct */
\r
847 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys));
\r
848 req->pat.yrgb_addr = (req->pat.yrgb_addr & (~PAGE_MASK));
\r
851 /* flush data to DDR */
\r
852 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
853 outer_flush_range(virt_to_phys(MMU_Base), virt_to_phys(MMU_Base + AllSize));
\r
855 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
856 reg->MMU_len = AllSize;
\r
858 if (pages != NULL) {
\r
859 /* Free the page table */
\r
873 static int rga2_mmu_info_update_patten_buff_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
875 int SrcMemSize, CMDMemSize;
\r
876 uint32_t SrcStart, CMDStart;
\r
877 struct page **pages = NULL;
\r
880 uint32_t *MMU_Base, *MMU_p;
\r
883 MMU_Base = MMU_p = 0;
\r
888 /* cal src buf mmu info */
\r
889 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.act_w * req->pat.act_h * 4, &SrcStart);
\r
890 if(SrcMemSize == 0) {
\r
894 /* cal cmd buf mmu info */
\r
895 CMDMemSize = rga2_mem_size_cal((uint32_t)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
896 if(CMDMemSize == 0) {
\r
900 AllSize = SrcMemSize + CMDMemSize;
\r
902 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
903 if(pages == NULL) {
\r
904 pr_err("RGA MMU malloc pages mem failed\n");
\r
905 status = RGA2_MALLOC_ERROR;
\r
909 MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
910 if(pages == NULL) {
\r
911 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
912 status = RGA2_MALLOC_ERROR;
\r
916 for(i=0; i<CMDMemSize; i++) {
\r
917 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
920 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
922 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
924 pr_err("rga map src memory failed\n");
\r
931 MMU_p = MMU_Base + CMDMemSize;
\r
933 for(i=0; i<SrcMemSize; i++)
\r
935 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
940 * change the buf address in req struct
\r
941 * for the reason of lie to MMU
\r
943 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
945 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
947 /*record the malloc buf for the cmd end to release*/
\r
948 reg->MMU_base = MMU_Base;
\r
950 /* flush data to DDR */
\r
951 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
952 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
954 if (pages != NULL) {
\r
955 /* Free the page table */
\r
970 int rga2_set_mmu_info(struct rga2_reg *reg, struct rga2_req *req)
\r
974 switch (req->render_mode) {
\r
976 ret = rga2_mmu_info_BitBlt_mode(reg, req);
\r
978 case color_palette_mode :
\r
979 ret = rga2_mmu_info_color_palette_mode(reg, req);
\r
981 case color_fill_mode :
\r
982 ret = rga2_mmu_info_color_fill_mode(reg, req);
\r
984 case update_palette_table_mode :
\r
985 ret = rga2_mmu_info_update_palette_table_mode(reg, req);
\r
987 case update_patten_buff_mode :
\r
988 ret = rga2_mmu_info_update_patten_buff_mode(reg, req);
\r