drivers/video/fbdev/fsl-diu-fb.c

   1 /*
   2  * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  *  Freescale DIU Frame Buffer device driver
   5  *
   6  *  Authors: Hongjun Chen <hong-jun.chen@freescale.com>
   7  *           Paul Widmer <paul.widmer@freescale.com>
   8  *           Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
   9  *           York Sun <yorksun@freescale.com>
  10  *
  11  *   Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  *
  18  */
  19
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/errno.h>
  23 #include <linux/string.h>
  24 #include <linux/slab.h>
  25 #include <linux/fb.h>
  26 #include <linux/init.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/clk.h>
  31 #include <linux/uaccess.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/of_address.h>
  35 #include <linux/of_irq.h>
  36
  37 #include <sysdev/fsl_soc.h>
  38 #include <linux/fsl-diu-fb.h>
  39 #include "edid.h"
  40
  41 #define NUM_AOIS        5       /* 1 for plane 0, 2 for planes 1 & 2 each */
  42
  43 /* HW cursor parameters */
  44 #define MAX_CURS                32
  45
  46 /* INT_STATUS/INT_MASK field descriptions */
  47 #define INT_VSYNC       0x01    /* Vsync interrupt  */
  48 #define INT_VSYNC_WB    0x02    /* Vsync interrupt for write back operation */
  49 #define INT_UNDRUN      0x04    /* Under run exception interrupt */
  50 #define INT_PARERR      0x08    /* Display parameters error interrupt */
  51 #define INT_LS_BF_VS    0x10    /* Lines before vsync. interrupt */
  52
  53 /*
  54  * List of supported video modes
  55  *
  56  * The first entry is the default video mode.  The remain entries are in
  57  * order if increasing resolution and frequency.  The 320x240-60 mode is
  58  * the initial AOI for the second and third planes.
  59  */
  60 static struct fb_videomode fsl_diu_mode_db[] = {
  61         {
  62                 .refresh        = 60,
  63                 .xres           = 1024,
  64                 .yres           = 768,
  65                 .pixclock       = 15385,
  66                 .left_margin    = 160,
  67                 .right_margin   = 24,
  68                 .upper_margin   = 29,
  69                 .lower_margin   = 3,
  70                 .hsync_len      = 136,
  71                 .vsync_len      = 6,
  72                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  73                 .vmode          = FB_VMODE_NONINTERLACED
  74         },
  75         {
  76                 .refresh        = 60,
  77                 .xres           = 320,
  78                 .yres           = 240,
  79                 .pixclock       = 79440,
  80                 .left_margin    = 16,
  81                 .right_margin   = 16,
  82                 .upper_margin   = 16,
  83                 .lower_margin   = 5,
  84                 .hsync_len      = 48,
  85                 .vsync_len      = 1,
  86                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  87                 .vmode          = FB_VMODE_NONINTERLACED
  88         },
  89         {
  90                 .refresh        = 60,
  91                 .xres           = 640,
  92                 .yres           = 480,
  93                 .pixclock       = 39722,
  94                 .left_margin    = 48,
  95                 .right_margin   = 16,
  96                 .upper_margin   = 33,
  97                 .lower_margin   = 10,
  98                 .hsync_len      = 96,
  99                 .vsync_len      = 2,
 100                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 101                 .vmode          = FB_VMODE_NONINTERLACED
 102         },
 103         {
 104                 .refresh        = 72,
 105                 .xres           = 640,
 106                 .yres           = 480,
 107                 .pixclock       = 32052,
 108                 .left_margin    = 128,
 109                 .right_margin   = 24,
 110                 .upper_margin   = 28,
 111                 .lower_margin   = 9,
 112                 .hsync_len      = 40,
 113                 .vsync_len      = 3,
 114                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 115                 .vmode          = FB_VMODE_NONINTERLACED
 116         },
 117         {
 118                 .refresh        = 75,
 119                 .xres           = 640,
 120                 .yres           = 480,
 121                 .pixclock       = 31747,
 122                 .left_margin    = 120,
 123                 .right_margin   = 16,
 124                 .upper_margin   = 16,
 125                 .lower_margin   = 1,
 126                 .hsync_len      = 64,
 127                 .vsync_len      = 3,
 128                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 129                 .vmode          = FB_VMODE_NONINTERLACED
 130         },
 131         {
 132                 .refresh        = 90,
 133                 .xres           = 640,
 134                 .yres           = 480,
 135                 .pixclock       = 25057,
 136                 .left_margin    = 120,
 137                 .right_margin   = 32,
 138                 .upper_margin   = 14,
 139                 .lower_margin   = 25,
 140                 .hsync_len      = 40,
 141                 .vsync_len      = 14,
 142                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 143                 .vmode          = FB_VMODE_NONINTERLACED
 144         },
 145         {
 146                 .refresh        = 100,
 147                 .xres           = 640,
 148                 .yres           = 480,
 149                 .pixclock       = 22272,
 150                 .left_margin    = 48,
 151                 .right_margin   = 32,
 152                 .upper_margin   = 17,
 153                 .lower_margin   = 22,
 154                 .hsync_len      = 128,
 155                 .vsync_len      = 12,
 156                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 157                 .vmode          = FB_VMODE_NONINTERLACED
 158         },
 159         {
 160                 .refresh        = 60,
 161                 .xres           = 800,
 162                 .yres           = 480,
 163                 .pixclock       = 33805,
 164                 .left_margin    = 96,
 165                 .right_margin   = 24,
 166                 .upper_margin   = 10,
 167                 .lower_margin   = 3,
 168                 .hsync_len      = 72,
 169                 .vsync_len      = 7,
 170                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 171                 .vmode          = FB_VMODE_NONINTERLACED
 172         },
 173         {
 174                 .refresh        = 60,
 175                 .xres           = 800,
 176                 .yres           = 600,
 177                 .pixclock       = 25000,
 178                 .left_margin    = 88,
 179                 .right_margin   = 40,
 180                 .upper_margin   = 23,
 181                 .lower_margin   = 1,
 182                 .hsync_len      = 128,
 183                 .vsync_len      = 4,
 184                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 185                 .vmode          = FB_VMODE_NONINTERLACED
 186         },
 187         {
 188                 .refresh        = 60,
 189                 .xres           = 854,
 190                 .yres           = 480,
 191                 .pixclock       = 31518,
 192                 .left_margin    = 104,
 193                 .right_margin   = 16,
 194                 .upper_margin   = 13,
 195                 .lower_margin   = 1,
 196                 .hsync_len      = 88,
 197                 .vsync_len      = 3,
 198                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 199                 .vmode          = FB_VMODE_NONINTERLACED
 200         },
 201         {
 202                 .refresh        = 70,
 203                 .xres           = 1024,
 204                 .yres           = 768,
 205                 .pixclock       = 16886,
 206                 .left_margin    = 3,
 207                 .right_margin   = 3,
 208                 .upper_margin   = 2,
 209                 .lower_margin   = 2,
 210                 .hsync_len      = 40,
 211                 .vsync_len      = 18,
 212                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 213                 .vmode          = FB_VMODE_NONINTERLACED
 214         },
 215         {
 216                 .refresh        = 75,
 217                 .xres           = 1024,
 218                 .yres           = 768,
 219                 .pixclock       = 15009,
 220                 .left_margin    = 3,
 221                 .right_margin   = 3,
 222                 .upper_margin   = 2,
 223                 .lower_margin   = 2,
 224                 .hsync_len      = 80,
 225                 .vsync_len      = 32,
 226                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 227                 .vmode          = FB_VMODE_NONINTERLACED
 228         },
 229         {
 230                 .refresh        = 60,
 231                 .xres           = 1280,
 232                 .yres           = 480,
 233                 .pixclock       = 18939,
 234                 .left_margin    = 353,
 235                 .right_margin   = 47,
 236                 .upper_margin   = 39,
 237                 .lower_margin   = 4,
 238                 .hsync_len      = 8,
 239                 .vsync_len      = 2,
 240                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 241                 .vmode          = FB_VMODE_NONINTERLACED
 242         },
 243         {
 244                 .refresh        = 60,
 245                 .xres           = 1280,
 246                 .yres           = 720,
 247                 .pixclock       = 13426,
 248                 .left_margin    = 192,
 249                 .right_margin   = 64,
 250                 .upper_margin   = 22,
 251                 .lower_margin   = 1,
 252                 .hsync_len      = 136,
 253                 .vsync_len      = 3,
 254                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 255                 .vmode          = FB_VMODE_NONINTERLACED
 256         },
 257         {
 258                 .refresh        = 60,
 259                 .xres           = 1280,
 260                 .yres           = 1024,
 261                 .pixclock       = 9375,
 262                 .left_margin    = 38,
 263                 .right_margin   = 128,
 264                 .upper_margin   = 2,
 265                 .lower_margin   = 7,
 266                 .hsync_len      = 216,
 267                 .vsync_len      = 37,
 268                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 269                 .vmode          = FB_VMODE_NONINTERLACED
 270         },
 271         {
 272                 .refresh        = 70,
 273                 .xres           = 1280,
 274                 .yres           = 1024,
 275                 .pixclock       = 9380,
 276                 .left_margin    = 6,
 277                 .right_margin   = 6,
 278                 .upper_margin   = 4,
 279                 .lower_margin   = 4,
 280                 .hsync_len      = 60,
 281                 .vsync_len      = 94,
 282                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 283                 .vmode          = FB_VMODE_NONINTERLACED
 284         },
 285         {
 286                 .refresh        = 75,
 287                 .xres           = 1280,
 288                 .yres           = 1024,
 289                 .pixclock       = 9380,
 290                 .left_margin    = 6,
 291                 .right_margin   = 6,
 292                 .upper_margin   = 4,
 293                 .lower_margin   = 4,
 294                 .hsync_len      = 60,
 295                 .vsync_len      = 15,
 296                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 297                 .vmode          = FB_VMODE_NONINTERLACED
 298         },
 299         {
 300                 .refresh        = 60,
 301                 .xres           = 1920,
 302                 .yres           = 1080,
 303                 .pixclock       = 5787,
 304                 .left_margin    = 328,
 305                 .right_margin   = 120,
 306                 .upper_margin   = 34,
 307                 .lower_margin   = 1,
 308                 .hsync_len      = 208,
 309                 .vsync_len      = 3,
 310                 .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 311                 .vmode          = FB_VMODE_NONINTERLACED
 312         },
 313 };
 314
 315 static char *fb_mode;
 316 static unsigned long default_bpp = 32;
 317 static enum fsl_diu_monitor_port monitor_port;
 318 static char *monitor_string;
 319
 320 #if defined(CONFIG_NOT_COHERENT_CACHE)
 321 static u8 *coherence_data;
 322 static size_t coherence_data_size;
 323 static unsigned int d_cache_line_size;
 324 #endif
 325
 326 static DEFINE_SPINLOCK(diu_lock);
 327
 328 enum mfb_index {
 329         PLANE0 = 0,     /* Plane 0, only one AOI that fills the screen */
 330         PLANE1_AOI0,    /* Plane 1, first AOI */
 331         PLANE1_AOI1,    /* Plane 1, second AOI */
 332         PLANE2_AOI0,    /* Plane 2, first AOI */
 333         PLANE2_AOI1,    /* Plane 2, second AOI */
 334 };
 335
 336 struct mfb_info {
 337         enum mfb_index index;
 338         char *id;
 339         int registered;
 340         unsigned long pseudo_palette[16];
 341         struct diu_ad *ad;
 342         unsigned char g_alpha;
 343         unsigned int count;
 344         int x_aoi_d;            /* aoi display x offset to physical screen */
 345         int y_aoi_d;            /* aoi display y offset to physical screen */
 346         struct fsl_diu_data *parent;
 347 };
 348
 349 /**
 350  * struct fsl_diu_data - per-DIU data structure
 351  * @dma_addr: DMA address of this structure
 352  * @fsl_diu_info: fb_info objects, one per AOI
 353  * @dev_attr: sysfs structure
 354  * @irq: IRQ
 355  * @monitor_port: the monitor port this DIU is connected to
 356  * @diu_reg: pointer to the DIU hardware registers
 357  * @reg_lock: spinlock for register access
 358  * @dummy_aoi: video buffer for the 4x4 32-bit dummy AOI
 359  * dummy_ad: DIU Area Descriptor for the dummy AOI
 360  * @ad[]: Area Descriptors for each real AOI
 361  * @gamma: gamma color table
 362  * @cursor: hardware cursor data
 363  *
 364  * This data structure must be allocated with 32-byte alignment, so that the
 365  * internal fields can be aligned properly.
 366  */
 367 struct fsl_diu_data {
 368         dma_addr_t dma_addr;
 369         struct fb_info fsl_diu_info[NUM_AOIS];
 370         struct mfb_info mfb[NUM_AOIS];
 371         struct device_attribute dev_attr;
 372         unsigned int irq;
 373         enum fsl_diu_monitor_port monitor_port;
 374         struct diu __iomem *diu_reg;
 375         spinlock_t reg_lock;
 376         u8 dummy_aoi[4 * 4 * 4];
 377         struct diu_ad dummy_ad __aligned(8);
 378         struct diu_ad ad[NUM_AOIS] __aligned(8);
 379         u8 gamma[256 * 3] __aligned(32);
 380         /* It's easier to parse the cursor data as little-endian */
 381         __le16 cursor[MAX_CURS * MAX_CURS] __aligned(32);
 382         /* Blank cursor data -- used to hide the cursor */
 383         __le16 blank_cursor[MAX_CURS * MAX_CURS] __aligned(32);
 384         uint8_t edid_data[EDID_LENGTH];
 385         bool has_edid;
 386 } __aligned(32);
 387
 388 /* Determine the DMA address of a member of the fsl_diu_data structure */
 389 #define DMA_ADDR(p, f) ((p)->dma_addr + offsetof(struct fsl_diu_data, f))
 390
 391 static struct mfb_info mfb_template[] = {
 392         {
 393                 .index = PLANE0,
 394                 .id = "Panel0",
 395                 .registered = 0,
 396                 .count = 0,
 397                 .x_aoi_d = 0,
 398                 .y_aoi_d = 0,
 399         },
 400         {
 401                 .index = PLANE1_AOI0,
 402                 .id = "Panel1 AOI0",
 403                 .registered = 0,
 404                 .g_alpha = 0xff,
 405                 .count = 0,
 406                 .x_aoi_d = 0,
 407                 .y_aoi_d = 0,
 408         },
 409         {
 410                 .index = PLANE1_AOI1,
 411                 .id = "Panel1 AOI1",
 412                 .registered = 0,
 413                 .g_alpha = 0xff,
 414                 .count = 0,
 415                 .x_aoi_d = 0,
 416                 .y_aoi_d = 480,
 417         },
 418         {
 419                 .index = PLANE2_AOI0,
 420                 .id = "Panel2 AOI0",
 421                 .registered = 0,
 422                 .g_alpha = 0xff,
 423                 .count = 0,
 424                 .x_aoi_d = 640,
 425                 .y_aoi_d = 0,
 426         },
 427         {
 428                 .index = PLANE2_AOI1,
 429                 .id = "Panel2 AOI1",
 430                 .registered = 0,
 431                 .g_alpha = 0xff,
 432                 .count = 0,
 433                 .x_aoi_d = 640,
 434                 .y_aoi_d = 480,
 435         },
 436 };
 437
 438 #ifdef DEBUG
 439 static void __attribute__ ((unused)) fsl_diu_dump(struct diu __iomem *hw)
 440 {
 441         mb();
 442         pr_debug("DIU: desc=%08x,%08x,%08x, gamma=%08x pallete=%08x "
 443                  "cursor=%08x curs_pos=%08x diu_mode=%08x bgnd=%08x "
 444                  "disp_size=%08x hsyn_para=%08x vsyn_para=%08x syn_pol=%08x "
 445                  "thresholds=%08x int_mask=%08x plut=%08x\n",
 446                  hw->desc[0], hw->desc[1], hw->desc[2], hw->gamma,
 447                  hw->pallete, hw->cursor, hw->curs_pos, hw->diu_mode,
 448                  hw->bgnd, hw->disp_size, hw->hsyn_para, hw->vsyn_para,
 449                  hw->syn_pol, hw->thresholds, hw->int_mask, hw->plut);
 450         rmb();
 451 }
 452 #endif
 453
 454 /**
 455  * fsl_diu_name_to_port - convert a port name to a monitor port enum
 456  *
 457  * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
 458  * the enum fsl_diu_monitor_port that corresponds to that string.
 459  *
 460  * For compatibility with older versions, a number ("0", "1", or "2") is also
 461  * supported.
 462  *
 463  * If the string is unknown, DVI is assumed.
 464  *
 465  * If the particular port is not supported by the platform, another port
 466  * (platform-specific) is chosen instead.
 467  */
 468 static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
 469 {
 470         enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
 471         unsigned long val;
 472
 473         if (s) {
 474                 if (!kstrtoul(s, 10, &val) && (val <= 2))
 475                         port = (enum fsl_diu_monitor_port) val;
 476                 else if (strncmp(s, "lvds", 4) == 0)
 477                         port = FSL_DIU_PORT_LVDS;
 478                 else if (strncmp(s, "dlvds", 5) == 0)
 479                         port = FSL_DIU_PORT_DLVDS;
 480         }
 481
 482         if (diu_ops.valid_monitor_port)
 483                 port = diu_ops.valid_monitor_port(port);
 484
 485         return port;
 486 }
 487
 488 /*
 489  * Workaround for failed writing desc register of planes.
 490  * Needed with MPC5121 DIU rev 2.0 silicon.
 491  */
 492 void wr_reg_wa(u32 *reg, u32 val)
 493 {
 494         do {
 495                 out_be32(reg, val);
 496         } while (in_be32(reg) != val);
 497 }
 498
 499 static void fsl_diu_enable_panel(struct fb_info *info)
 500 {
 501         struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
 502         struct diu_ad *ad = mfbi->ad;
 503         struct fsl_diu_data *data = mfbi->parent;
 504         struct diu __iomem *hw = data->diu_reg;
 505
 506         switch (mfbi->index) {
 507         case PLANE0:
 508                 wr_reg_wa(&hw->desc[0], ad->paddr);
 509                 break;
 510         case PLANE1_AOI0:
 511                 cmfbi = &data->mfb[2];
 512                 if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
 513                         if (cmfbi->count > 0)   /* AOI1 open */
 514                                 ad->next_ad =
 515                                         cpu_to_le32(cmfbi->ad->paddr);
 516                         else
 517                                 ad->next_ad = 0;
 518                         wr_reg_wa(&hw->desc[1], ad->paddr);
 519                 }
 520                 break;
 521         case PLANE2_AOI0:
 522                 cmfbi = &data->mfb[4];
 523                 if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
 524                         if (cmfbi->count > 0)   /* AOI1 open */
 525                                 ad->next_ad =
 526                                         cpu_to_le32(cmfbi->ad->paddr);
 527                         else
 528                                 ad->next_ad = 0;
 529                         wr_reg_wa(&hw->desc[2], ad->paddr);
 530                 }
 531                 break;
 532         case PLANE1_AOI1:
 533                 pmfbi = &data->mfb[1];
 534                 ad->next_ad = 0;
 535                 if (hw->desc[1] == data->dummy_ad.paddr)
 536                         wr_reg_wa(&hw->desc[1], ad->paddr);
 537                 else                                    /* AOI0 open */
 538                         pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
 539                 break;
 540         case PLANE2_AOI1:
 541                 pmfbi = &data->mfb[3];
 542                 ad->next_ad = 0;
 543                 if (hw->desc[2] == data->dummy_ad.paddr)
 544                         wr_reg_wa(&hw->desc[2], ad->paddr);
 545                 else                            /* AOI0 was open */
 546                         pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
 547                 break;
 548         }
 549 }
 550
 551 static void fsl_diu_disable_panel(struct fb_info *info)
 552 {
 553         struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
 554         struct diu_ad *ad = mfbi->ad;
 555         struct fsl_diu_data *data = mfbi->parent;
 556         struct diu __iomem *hw = data->diu_reg;
 557
 558         switch (mfbi->index) {
 559         case PLANE0:
 560                 wr_reg_wa(&hw->desc[0], 0);
 561                 break;
 562         case PLANE1_AOI0:
 563                 cmfbi = &data->mfb[2];
 564                 if (cmfbi->count > 0)   /* AOI1 is open */
 565                         wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
 566                                         /* move AOI1 to the first */
 567                 else                    /* AOI1 was closed */
 568                         wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr);
 569                                         /* close AOI 0 */
 570                 break;
 571         case PLANE2_AOI0:
 572                 cmfbi = &data->mfb[4];
 573                 if (cmfbi->count > 0)   /* AOI1 is open */
 574                         wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
 575                                         /* move AOI1 to the first */
 576                 else                    /* AOI1 was closed */
 577                         wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr);
 578                                         /* close AOI 0 */
 579                 break;
 580         case PLANE1_AOI1:
 581                 pmfbi = &data->mfb[1];
 582                 if (hw->desc[1] != ad->paddr) {
 583                                 /* AOI1 is not the first in the chain */
 584                         if (pmfbi->count > 0)
 585                                         /* AOI0 is open, must be the first */
 586                                 pmfbi->ad->next_ad = 0;
 587                 } else                  /* AOI1 is the first in the chain */
 588                         wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr);
 589                                         /* close AOI 1 */
 590                 break;
 591         case PLANE2_AOI1:
 592                 pmfbi = &data->mfb[3];
 593                 if (hw->desc[2] != ad->paddr) {
 594                                 /* AOI1 is not the first in the chain */
 595                         if (pmfbi->count > 0)
 596                                 /* AOI0 is open, must be the first */
 597                                 pmfbi->ad->next_ad = 0;
 598                 } else          /* AOI1 is the first in the chain */
 599                         wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr);
 600                                 /* close AOI 1 */
 601                 break;
 602         }
 603 }
 604
 605 static void enable_lcdc(struct fb_info *info)
 606 {
 607         struct mfb_info *mfbi = info->par;
 608         struct fsl_diu_data *data = mfbi->parent;
 609         struct diu __iomem *hw = data->diu_reg;
 610
 611         out_be32(&hw->diu_mode, MFB_MODE1);
 612 }
 613
 614 static void disable_lcdc(struct fb_info *info)
 615 {
 616         struct mfb_info *mfbi = info->par;
 617         struct fsl_diu_data *data = mfbi->parent;
 618         struct diu __iomem *hw = data->diu_reg;
 619
 620         out_be32(&hw->diu_mode, 0);
 621 }
 622
 623 static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
 624                                 struct fb_info *info)
 625 {
 626         struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
 627         struct fsl_diu_data *data = mfbi->parent;
 628         int available_height, upper_aoi_bottom;
 629         enum mfb_index index = mfbi->index;
 630         int lower_aoi_is_open, upper_aoi_is_open;
 631         __u32 base_plane_width, base_plane_height, upper_aoi_height;
 632
 633         base_plane_width = data->fsl_diu_info[0].var.xres;
 634         base_plane_height = data->fsl_diu_info[0].var.yres;
 635
 636         if (mfbi->x_aoi_d < 0)
 637                 mfbi->x_aoi_d = 0;
 638         if (mfbi->y_aoi_d < 0)
 639                 mfbi->y_aoi_d = 0;
 640         switch (index) {
 641         case PLANE0:
 642                 if (mfbi->x_aoi_d != 0)
 643                         mfbi->x_aoi_d = 0;
 644                 if (mfbi->y_aoi_d != 0)
 645                         mfbi->y_aoi_d = 0;
 646                 break;
 647         case PLANE1_AOI0:
 648         case PLANE2_AOI0:
 649                 lower_aoi_mfbi = data->fsl_diu_info[index+1].par;
 650                 lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
 651                 if (var->xres > base_plane_width)
 652                         var->xres = base_plane_width;
 653                 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
 654                         mfbi->x_aoi_d = base_plane_width - var->xres;
 655
 656                 if (lower_aoi_is_open)
 657                         available_height = lower_aoi_mfbi->y_aoi_d;
 658                 else
 659                         available_height = base_plane_height;
 660                 if (var->yres > available_height)
 661                         var->yres = available_height;
 662                 if ((mfbi->y_aoi_d + var->yres) > available_height)
 663                         mfbi->y_aoi_d = available_height - var->yres;
 664                 break;
 665         case PLANE1_AOI1:
 666         case PLANE2_AOI1:
 667                 upper_aoi_mfbi = data->fsl_diu_info[index-1].par;
 668                 upper_aoi_height = data->fsl_diu_info[index-1].var.yres;
 669                 upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
 670                 upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
 671                 if (var->xres > base_plane_width)
 672                         var->xres = base_plane_width;
 673                 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
 674                         mfbi->x_aoi_d = base_plane_width - var->xres;
 675                 if (mfbi->y_aoi_d < 0)
 676                         mfbi->y_aoi_d = 0;
 677                 if (upper_aoi_is_open) {
 678                         if (mfbi->y_aoi_d < upper_aoi_bottom)
 679                                 mfbi->y_aoi_d = upper_aoi_bottom;
 680                         available_height = base_plane_height
 681                                                 - upper_aoi_bottom;
 682                 } else
 683                         available_height = base_plane_height;
 684                 if (var->yres > available_height)
 685                         var->yres = available_height;
 686                 if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
 687                         mfbi->y_aoi_d = base_plane_height - var->yres;
 688                 break;
 689         }
 690 }
 691 /*
 692  * Checks to see if the hardware supports the state requested by var passed
 693  * in. This function does not alter the hardware state! If the var passed in
 694  * is slightly off by what the hardware can support then we alter the var
 695  * PASSED in to what we can do. If the hardware doesn't support mode change
 696  * a -EINVAL will be returned by the upper layers.
 697  */
 698 static int fsl_diu_check_var(struct fb_var_screeninfo *var,
 699                                 struct fb_info *info)
 700 {
 701         if (var->xres_virtual < var->xres)
 702                 var->xres_virtual = var->xres;
 703         if (var->yres_virtual < var->yres)
 704                 var->yres_virtual = var->yres;
 705
 706         if (var->xoffset < 0)
 707                 var->xoffset = 0;
 708
 709         if (var->yoffset < 0)
 710                 var->yoffset = 0;
 711
 712         if (var->xoffset + info->var.xres > info->var.xres_virtual)
 713                 var->xoffset = info->var.xres_virtual - info->var.xres;
 714
 715         if (var->yoffset + info->var.yres > info->var.yres_virtual)
 716                 var->yoffset = info->var.yres_virtual - info->var.yres;
 717
 718         if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
 719             (var->bits_per_pixel != 16))
 720                 var->bits_per_pixel = default_bpp;
 721
 722         switch (var->bits_per_pixel) {
 723         case 16:
 724                 var->red.length = 5;
 725                 var->red.offset = 11;
 726                 var->red.msb_right = 0;
 727
 728                 var->green.length = 6;
 729                 var->green.offset = 5;
 730                 var->green.msb_right = 0;
 731
 732                 var->blue.length = 5;
 733                 var->blue.offset = 0;
 734                 var->blue.msb_right = 0;
 735
 736                 var->transp.length = 0;
 737                 var->transp.offset = 0;
 738                 var->transp.msb_right = 0;
 739                 break;
 740         case 24:
 741                 var->red.length = 8;
 742                 var->red.offset = 0;
 743                 var->red.msb_right = 0;
 744
 745                 var->green.length = 8;
 746                 var->green.offset = 8;
 747                 var->green.msb_right = 0;
 748
 749                 var->blue.length = 8;
 750                 var->blue.offset = 16;
 751                 var->blue.msb_right = 0;
 752
 753                 var->transp.length = 0;
 754                 var->transp.offset = 0;
 755                 var->transp.msb_right = 0;
 756                 break;
 757         case 32:
 758                 var->red.length = 8;
 759                 var->red.offset = 16;
 760                 var->red.msb_right = 0;
 761
 762                 var->green.length = 8;
 763                 var->green.offset = 8;
 764                 var->green.msb_right = 0;
 765
 766                 var->blue.length = 8;
 767                 var->blue.offset = 0;
 768                 var->blue.msb_right = 0;
 769
 770                 var->transp.length = 8;
 771                 var->transp.offset = 24;
 772                 var->transp.msb_right = 0;
 773
 774                 break;
 775         }
 776
 777         var->height = -1;
 778         var->width = -1;
 779         var->grayscale = 0;
 780
 781         /* Copy nonstd field to/from sync for fbset usage */
 782         var->sync |= var->nonstd;
 783         var->nonstd |= var->sync;
 784
 785         adjust_aoi_size_position(var, info);
 786         return 0;
 787 }
 788
 789 static void set_fix(struct fb_info *info)
 790 {
 791         struct fb_fix_screeninfo *fix = &info->fix;
 792         struct fb_var_screeninfo *var = &info->var;
 793         struct mfb_info *mfbi = info->par;
 794
 795         strncpy(fix->id, mfbi->id, sizeof(fix->id));
 796         fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
 797         fix->type = FB_TYPE_PACKED_PIXELS;
 798         fix->accel = FB_ACCEL_NONE;
 799         fix->visual = FB_VISUAL_TRUECOLOR;
 800         fix->xpanstep = 1;
 801         fix->ypanstep = 1;
 802 }
 803
 804 static void update_lcdc(struct fb_info *info)
 805 {
 806         struct fb_var_screeninfo *var = &info->var;
 807         struct mfb_info *mfbi = info->par;
 808         struct fsl_diu_data *data = mfbi->parent;
 809         struct diu __iomem *hw;
 810         int i, j;
 811         u8 *gamma_table_base;
 812
 813         u32 temp;
 814
 815         hw = data->diu_reg;
 816
 817         if (diu_ops.set_monitor_port)
 818                 diu_ops.set_monitor_port(data->monitor_port);
 819         gamma_table_base = data->gamma;
 820
 821         /* Prep for DIU init  - gamma table, cursor table */
 822
 823         for (i = 0; i <= 2; i++)
 824                 for (j = 0; j <= 255; j++)
 825                         *gamma_table_base++ = j;
 826
 827         if (diu_ops.set_gamma_table)
 828                 diu_ops.set_gamma_table(data->monitor_port, data->gamma);
 829
 830         disable_lcdc(info);
 831
 832         /* Program DIU registers */
 833
 834         out_be32(&hw->gamma, DMA_ADDR(data, gamma));
 835
 836         out_be32(&hw->bgnd, 0x007F7F7F); /* Set background to grey */
 837         out_be32(&hw->disp_size, (var->yres << 16) | var->xres);
 838
 839         /* Horizontal and vertical configuration register */
 840         temp = var->left_margin << 22 | /* BP_H */
 841                var->hsync_len << 11 |   /* PW_H */
 842                var->right_margin;       /* FP_H */
 843
 844         out_be32(&hw->hsyn_para, temp);
 845
 846         temp = var->upper_margin << 22 | /* BP_V */
 847                var->vsync_len << 11 |    /* PW_V  */
 848                var->lower_margin;        /* FP_V  */
 849
 850         out_be32(&hw->vsyn_para, temp);
 851
 852         diu_ops.set_pixel_clock(var->pixclock);
 853
 854 #ifndef CONFIG_PPC_MPC512x
 855         /*
 856          * The PLUT register is defined differently on the MPC5121 than it
 857          * is on other SOCs.  Unfortunately, there's no documentation that
 858          * explains how it's supposed to be programmed, so for now, we leave
 859          * it at the default value on the MPC5121.
 860          *
 861          * For other SOCs, program it for the highest priority, which will
 862          * reduce the chance of underrun. Technically, we should scale the
 863          * priority to match the screen resolution, but doing that properly
 864          * requires delicate fine-tuning for each use-case.
 865          */
 866         out_be32(&hw->plut, 0x01F5F666);
 867 #endif
 868
 869         /* Enable the DIU */
 870         enable_lcdc(info);
 871 }
 872
 873 static int map_video_memory(struct fb_info *info)
 874 {
 875         u32 smem_len = info->fix.line_length * info->var.yres_virtual;
 876         void *p;
 877
 878         p = alloc_pages_exact(smem_len, GFP_DMA | __GFP_ZERO);
 879         if (!p) {
 880                 dev_err(info->dev, "unable to allocate fb memory\n");
 881                 return -ENOMEM;
 882         }
 883         mutex_lock(&info->mm_lock);
 884         info->screen_base = p;
 885         info->fix.smem_start = virt_to_phys(info->screen_base);
 886         info->fix.smem_len = smem_len;
 887         mutex_unlock(&info->mm_lock);
 888         info->screen_size = info->fix.smem_len;
 889
 890         return 0;
 891 }
 892
 893 static void unmap_video_memory(struct fb_info *info)
 894 {
 895         void *p = info->screen_base;
 896         size_t l = info->fix.smem_len;
 897
 898         mutex_lock(&info->mm_lock);
 899         info->screen_base = NULL;
 900         info->fix.smem_start = 0;
 901         info->fix.smem_len = 0;
 902         mutex_unlock(&info->mm_lock);
 903
 904         if (p)
 905                 free_pages_exact(p, l);
 906 }
 907
 908 /*
 909  * Using the fb_var_screeninfo in fb_info we set the aoi of this
 910  * particular framebuffer. It is a light version of fsl_diu_set_par.
 911  */
 912 static int fsl_diu_set_aoi(struct fb_info *info)
 913 {
 914         struct fb_var_screeninfo *var = &info->var;
 915         struct mfb_info *mfbi = info->par;
 916         struct diu_ad *ad = mfbi->ad;
 917
 918         /* AOI should not be greater than display size */
 919         ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
 920         ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
 921         return 0;
 922 }
 923
 924 /**
 925  * fsl_diu_get_pixel_format: return the pixel format for a given color depth
 926  *
 927  * The pixel format is a 32-bit value that determine which bits in each
 928  * pixel are to be used for each color.  This is the default function used
 929  * if the platform does not define its own version.
 930  */
 931 static u32 fsl_diu_get_pixel_format(unsigned int bits_per_pixel)
 932 {
 933 #define PF_BYTE_F               0x10000000
 934 #define PF_ALPHA_C_MASK         0x0E000000
 935 #define PF_ALPHA_C_SHIFT        25
 936 #define PF_BLUE_C_MASK          0x01800000
 937 #define PF_BLUE_C_SHIFT         23
 938 #define PF_GREEN_C_MASK         0x00600000
 939 #define PF_GREEN_C_SHIFT        21
 940 #define PF_RED_C_MASK           0x00180000
 941 #define PF_RED_C_SHIFT          19
 942 #define PF_PALETTE              0x00040000
 943 #define PF_PIXEL_S_MASK         0x00030000
 944 #define PF_PIXEL_S_SHIFT        16
 945 #define PF_COMP_3_MASK          0x0000F000
 946 #define PF_COMP_3_SHIFT         12
 947 #define PF_COMP_2_MASK          0x00000F00
 948 #define PF_COMP_2_SHIFT         8
 949 #define PF_COMP_1_MASK          0x000000F0
 950 #define PF_COMP_1_SHIFT         4
 951 #define PF_COMP_0_MASK          0x0000000F
 952 #define PF_COMP_0_SHIFT         0
 953
 954 #define MAKE_PF(alpha, red, green, blue, size, c0, c1, c2, c3) \
 955         cpu_to_le32(PF_BYTE_F | (alpha << PF_ALPHA_C_SHIFT) | \
 956         (blue << PF_BLUE_C_SHIFT) | (green << PF_GREEN_C_SHIFT) | \
 957         (red << PF_RED_C_SHIFT) | (c3 << PF_COMP_3_SHIFT) | \
 958         (c2 << PF_COMP_2_SHIFT) | (c1 << PF_COMP_1_SHIFT) | \
 959         (c0 << PF_COMP_0_SHIFT) | (size << PF_PIXEL_S_SHIFT))
 960
 961         switch (bits_per_pixel) {
 962         case 32:
 963                 /* 0x88883316 */
 964                 return MAKE_PF(3, 2, 1, 0, 3, 8, 8, 8, 8);
 965         case 24:
 966                 /* 0x88082219 */
 967                 return MAKE_PF(4, 0, 1, 2, 2, 8, 8, 8, 0);
 968         case 16:
 969                 /* 0x65053118 */
 970                 return MAKE_PF(4, 2, 1, 0, 1, 5, 6, 5, 0);
 971         default:
 972                 pr_err("fsl-diu: unsupported color depth %u\n", bits_per_pixel);
 973                 return 0;
 974         }
 975 }
 976
 977 /*
 978  * Copies a cursor image from user space to the proper place in driver
 979  * memory so that the hardware can display the cursor image.
 980  *
 981  * Cursor data is represented as a sequence of 'width' bits packed into bytes.
 982  * That is, the first 8 bits are in the first byte, the second 8 bits in the
 983  * second byte, and so on.  Therefore, the each row of the cursor is (width +
 984  * 7) / 8 bytes of 'data'
 985  *
 986  * The DIU only supports cursors up to 32x32 (MAX_CURS).  We reject cursors
 987  * larger than this, so we already know that 'width' <= 32.  Therefore, we can
 988  * simplify our code by using a 32-bit big-endian integer ("line") to read in
 989  * a single line of pixels, and only look at the top 'width' bits of that
 990  * integer.
 991  *
 992  * This could result in an unaligned 32-bit read.  For example, if the cursor
 993  * is 24x24, then the first three bytes of 'image' contain the pixel data for
 994  * the top line of the cursor.  We do a 32-bit read of 'image', but we look
 995  * only at the top 24 bits.  Then we increment 'image' by 3 bytes.  The next
 996  * read is unaligned.  The only problem is that we might read past the end of
 997  * 'image' by 1-3 bytes, but that should not cause any problems.
 998  */
 999 static void fsl_diu_load_cursor_image(struct fb_info *info,
1000         const void *image, uint16_t bg, uint16_t fg,
1001         unsigned int width, unsigned int height)
1002 {
1003         struct mfb_info *mfbi = info->par;
1004         struct fsl_diu_data *data = mfbi->parent;
1005         __le16 *cursor = data->cursor;
1006         __le16 _fg = cpu_to_le16(fg);
1007         __le16 _bg = cpu_to_le16(bg);
1008         unsigned int h, w;
1009
1010         for (h = 0; h < height; h++) {
1011                 uint32_t mask = 1 << 31;
1012                 uint32_t line = be32_to_cpup(image);
1013
1014                 for (w = 0; w < width; w++) {
1015                         cursor[w] = (line & mask) ? _fg : _bg;
1016                         mask >>= 1;
1017                 }
1018
1019                 cursor += MAX_CURS;
1020                 image += DIV_ROUND_UP(width, 8);
1021         }
1022 }
1023
1024 /*
1025  * Set a hardware cursor.  The image data for the cursor is passed via the
1026  * fb_cursor object.
1027  */
1028 static int fsl_diu_cursor(struct fb_info *info, struct fb_cursor *cursor)
1029 {
1030         struct mfb_info *mfbi = info->par;
1031         struct fsl_diu_data *data = mfbi->parent;
1032         struct diu __iomem *hw = data->diu_reg;
1033
1034         if (cursor->image.width > MAX_CURS || cursor->image.height > MAX_CURS)
1035                 return -EINVAL;
1036
1037         /* The cursor size has changed */
1038         if (cursor->set & FB_CUR_SETSIZE) {
1039                 /*
1040                  * The DIU cursor is a fixed size, so when we get this
1041                  * message, instead of resizing the cursor, we just clear
1042                  * all the image data, in expectation of new data.  However,
1043                  * in tests this control does not appear to be normally
1044                  * called.
1045                  */
1046                 memset(data->cursor, 0, sizeof(data->cursor));
1047         }
1048
1049         /* The cursor position has changed (cursor->image.dx|dy) */
1050         if (cursor->set & FB_CUR_SETPOS) {
1051                 uint32_t xx, yy;
1052
1053                 yy = (cursor->image.dy - info->var.yoffset) & 0x7ff;
1054                 xx = (cursor->image.dx - info->var.xoffset) & 0x7ff;
1055
1056                 out_be32(&hw->curs_pos, yy << 16 | xx);
1057         }
1058
1059         /*
1060          * FB_CUR_SETIMAGE - the cursor image has changed
1061          * FB_CUR_SETCMAP  - the cursor colors has changed
1062          * FB_CUR_SETSHAPE - the cursor bitmask has changed
1063          */
1064         if (cursor->set & (FB_CUR_SETSHAPE | FB_CUR_SETCMAP | FB_CUR_SETIMAGE)) {
1065                 unsigned int image_size =
1066                         DIV_ROUND_UP(cursor->image.width, 8) * cursor->image.height;
1067                 unsigned int image_words =
1068                         DIV_ROUND_UP(image_size, sizeof(uint32_t));
1069                 unsigned int bg_idx = cursor->image.bg_color;
1070                 unsigned int fg_idx = cursor->image.fg_color;
1071                 uint8_t buffer[image_size];
1072                 uint32_t *image, *source, *mask;
1073                 uint16_t fg, bg;
1074                 unsigned int i;
1075
1076                 if (info->state != FBINFO_STATE_RUNNING)
1077                         return 0;
1078
1079                 /*
1080                  * Determine the size of the cursor image data.  Normally,
1081                  * it's 8x16.
1082                  */
1083                 image_size = DIV_ROUND_UP(cursor->image.width, 8) *
1084                         cursor->image.height;
1085
1086                 bg = ((info->cmap.red[bg_idx] & 0xf8) << 7) |
1087                      ((info->cmap.green[bg_idx] & 0xf8) << 2) |
1088                      ((info->cmap.blue[bg_idx] & 0xf8) >> 3) |
1089                      1 << 15;
1090
1091                 fg = ((info->cmap.red[fg_idx] & 0xf8) << 7) |
1092                      ((info->cmap.green[fg_idx] & 0xf8) << 2) |
1093                      ((info->cmap.blue[fg_idx] & 0xf8) >> 3) |
1094                      1 << 15;
1095
1096                 /* Use 32-bit operations on the data to improve performance */
1097                 image = (uint32_t *)buffer;
1098                 source = (uint32_t *)cursor->image.data;
1099                 mask = (uint32_t *)cursor->mask;
1100
1101                 if (cursor->rop == ROP_XOR)
1102                         for (i = 0; i < image_words; i++)
1103                                 image[i] = source[i] ^ mask[i];
1104                 else
1105                         for (i = 0; i < image_words; i++)
1106                                 image[i] = source[i] & mask[i];
1107
1108                 fsl_diu_load_cursor_image(info, image, bg, fg,
1109                         cursor->image.width, cursor->image.height);
1110         }
1111
1112         /*
1113          * Show or hide the cursor.  The cursor data is always stored in the
1114          * 'cursor' memory block, and the actual cursor position is always in
1115          * the DIU's CURS_POS register.  To hide the cursor, we redirect the
1116          * CURSOR register to a blank cursor.  The show the cursor, we
1117          * redirect the CURSOR register to the real cursor data.
1118          */
1119         if (cursor->enable)
1120                 out_be32(&hw->cursor, DMA_ADDR(data, cursor));
1121         else
1122                 out_be32(&hw->cursor, DMA_ADDR(data, blank_cursor));
1123
1124         return 0;
1125 }
1126
1127 /*
1128  * Using the fb_var_screeninfo in fb_info we set the resolution of this
1129  * particular framebuffer. This function alters the fb_fix_screeninfo stored
1130  * in fb_info. It does not alter var in fb_info since we are using that
1131  * data. This means we depend on the data in var inside fb_info to be
1132  * supported by the hardware. fsl_diu_check_var is always called before
1133  * fsl_diu_set_par to ensure this.
1134  */
1135 static int fsl_diu_set_par(struct fb_info *info)
1136 {
1137         unsigned long len;
1138         struct fb_var_screeninfo *var = &info->var;
1139         struct mfb_info *mfbi = info->par;
1140         struct fsl_diu_data *data = mfbi->parent;
1141         struct diu_ad *ad = mfbi->ad;
1142         struct diu __iomem *hw;
1143
1144         hw = data->diu_reg;
1145
1146         set_fix(info);
1147
1148         len = info->var.yres_virtual * info->fix.line_length;
1149         /* Alloc & dealloc each time resolution/bpp change */
1150         if (len != info->fix.smem_len) {
1151                 if (info->fix.smem_start)
1152                         unmap_video_memory(info);
1153
1154                 /* Memory allocation for framebuffer */
1155                 if (map_video_memory(info)) {
1156                         dev_err(info->dev, "unable to allocate fb memory 1\n");
1157                         return -ENOMEM;
1158                 }
1159         }
1160
1161         if (diu_ops.get_pixel_format)
1162                 ad->pix_fmt = diu_ops.get_pixel_format(data->monitor_port,
1163                                                        var->bits_per_pixel);
1164         else
1165                 ad->pix_fmt = fsl_diu_get_pixel_format(var->bits_per_pixel);
1166
1167         ad->addr    = cpu_to_le32(info->fix.smem_start);
1168         ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
1169                                 var->xres_virtual) | mfbi->g_alpha;
1170         /* AOI should not be greater than display size */
1171         ad->aoi_size    = cpu_to_le32((var->yres << 16) | var->xres);
1172         ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
1173         ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
1174
1175         /* Disable chroma keying function */
1176         ad->ckmax_r = 0;
1177         ad->ckmax_g = 0;
1178         ad->ckmax_b = 0;
1179
1180         ad->ckmin_r = 255;
1181         ad->ckmin_g = 255;
1182         ad->ckmin_b = 255;
1183
1184         if (mfbi->index == PLANE0)
1185                 update_lcdc(info);
1186         return 0;
1187 }
1188
1189 static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
1190 {
1191         return ((val << width) + 0x7FFF - val) >> 16;
1192 }
1193
1194 /*
1195  * Set a single color register. The values supplied have a 16 bit magnitude
1196  * which needs to be scaled in this function for the hardware. Things to take
1197  * into consideration are how many color registers, if any, are supported with
1198  * the current color visual. With truecolor mode no color palettes are
1199  * supported. Here a pseudo palette is created which we store the value in
1200  * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
1201  * color palette.
1202  */
1203 static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
1204                              unsigned int green, unsigned int blue,
1205                              unsigned int transp, struct fb_info *info)
1206 {
1207         int ret = 1;
1208
1209         /*
1210          * If greyscale is true, then we convert the RGB value
1211          * to greyscale no matter what visual we are using.
1212          */
1213         if (info->var.grayscale)
1214                 red = green = blue = (19595 * red + 38470 * green +
1215                                       7471 * blue) >> 16;
1216         switch (info->fix.visual) {
1217         case FB_VISUAL_TRUECOLOR:
1218                 /*
1219                  * 16-bit True Colour.  We encode the RGB value
1220                  * according to the RGB bitfield information.
1221                  */
1222                 if (regno < 16) {
1223                         u32 *pal = info->pseudo_palette;
1224                         u32 v;
1225
1226                         red = CNVT_TOHW(red, info->var.red.length);
1227                         green = CNVT_TOHW(green, info->var.green.length);
1228                         blue = CNVT_TOHW(blue, info->var.blue.length);
1229                         transp = CNVT_TOHW(transp, info->var.transp.length);
1230
1231                         v = (red << info->var.red.offset) |
1232                             (green << info->var.green.offset) |
1233                             (blue << info->var.blue.offset) |
1234                             (transp << info->var.transp.offset);
1235
1236                         pal[regno] = v;
1237                         ret = 0;
1238                 }
1239                 break;
1240         }
1241
1242         return ret;
1243 }
1244
1245 /*
1246  * Pan (or wrap, depending on the `vmode' field) the display using the
1247  * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
1248  * don't fit, return -EINVAL.
1249  */
1250 static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
1251                              struct fb_info *info)
1252 {
1253         if ((info->var.xoffset == var->xoffset) &&
1254             (info->var.yoffset == var->yoffset))
1255                 return 0;       /* No change, do nothing */
1256
1257         if (var->xoffset < 0 || var->yoffset < 0
1258             || var->xoffset + info->var.xres > info->var.xres_virtual
1259             || var->yoffset + info->var.yres > info->var.yres_virtual)
1260                 return -EINVAL;
1261
1262         info->var.xoffset = var->xoffset;
1263         info->var.yoffset = var->yoffset;
1264
1265         if (var->vmode & FB_VMODE_YWRAP)
1266                 info->var.vmode |= FB_VMODE_YWRAP;
1267         else
1268                 info->var.vmode &= ~FB_VMODE_YWRAP;
1269
1270         fsl_diu_set_aoi(info);
1271
1272         return 0;
1273 }
1274
1275 static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
1276                        unsigned long arg)
1277 {
1278         struct mfb_info *mfbi = info->par;
1279         struct diu_ad *ad = mfbi->ad;
1280         struct mfb_chroma_key ck;
1281         unsigned char global_alpha;
1282         struct aoi_display_offset aoi_d;
1283         __u32 pix_fmt;
1284         void __user *buf = (void __user *)arg;
1285
1286         if (!arg)
1287                 return -EINVAL;
1288
1289         dev_dbg(info->dev, "ioctl %08x (dir=%s%s type=%u nr=%u size=%u)\n", cmd,
1290                 _IOC_DIR(cmd) & _IOC_READ ? "R" : "",
1291                 _IOC_DIR(cmd) & _IOC_WRITE ? "W" : "",
1292                 _IOC_TYPE(cmd), _IOC_NR(cmd), _IOC_SIZE(cmd));
1293
1294         switch (cmd) {
1295         case MFB_SET_PIXFMT_OLD:
1296                 dev_warn(info->dev,
1297                          "MFB_SET_PIXFMT value of 0x%08x is deprecated.\n",
1298                          MFB_SET_PIXFMT_OLD);
1299         case MFB_SET_PIXFMT:
1300                 if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
1301                         return -EFAULT;
1302                 ad->pix_fmt = pix_fmt;
1303                 break;
1304         case MFB_GET_PIXFMT_OLD:
1305                 dev_warn(info->dev,
1306                          "MFB_GET_PIXFMT value of 0x%08x is deprecated.\n",
1307                          MFB_GET_PIXFMT_OLD);
1308         case MFB_GET_PIXFMT:
1309                 pix_fmt = ad->pix_fmt;
1310                 if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
1311                         return -EFAULT;
1312                 break;
1313         case MFB_SET_AOID:
1314                 if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
1315                         return -EFAULT;
1316                 mfbi->x_aoi_d = aoi_d.x_aoi_d;
1317                 mfbi->y_aoi_d = aoi_d.y_aoi_d;
1318                 fsl_diu_check_var(&info->var, info);
1319                 fsl_diu_set_aoi(info);
1320                 break;
1321         case MFB_GET_AOID:
1322                 aoi_d.x_aoi_d = mfbi->x_aoi_d;
1323                 aoi_d.y_aoi_d = mfbi->y_aoi_d;
1324                 if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
1325                         return -EFAULT;
1326                 break;
1327         case MFB_GET_ALPHA:
1328                 global_alpha = mfbi->g_alpha;
1329                 if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
1330                         return -EFAULT;
1331                 break;
1332         case MFB_SET_ALPHA:
1333                 /* set panel information */
1334                 if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
1335                         return -EFAULT;
1336                 ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
1337                                                         (global_alpha & 0xff);
1338                 mfbi->g_alpha = global_alpha;
1339                 break;
1340         case MFB_SET_CHROMA_KEY:
1341                 /* set panel winformation */
1342                 if (copy_from_user(&ck, buf, sizeof(ck)))
1343                         return -EFAULT;
1344
1345                 if (ck.enable &&
1346                    (ck.red_max < ck.red_min ||
1347                     ck.green_max < ck.green_min ||
1348                     ck.blue_max < ck.blue_min))
1349                         return -EINVAL;
1350
1351                 if (!ck.enable) {
1352                         ad->ckmax_r = 0;
1353                         ad->ckmax_g = 0;
1354                         ad->ckmax_b = 0;
1355                         ad->ckmin_r = 255;
1356                         ad->ckmin_g = 255;
1357                         ad->ckmin_b = 255;
1358                 } else {
1359                         ad->ckmax_r = ck.red_max;
1360                         ad->ckmax_g = ck.green_max;
1361                         ad->ckmax_b = ck.blue_max;
1362                         ad->ckmin_r = ck.red_min;
1363                         ad->ckmin_g = ck.green_min;
1364                         ad->ckmin_b = ck.blue_min;
1365                 }
1366                 break;
1367 #ifdef CONFIG_PPC_MPC512x
1368         case MFB_SET_GAMMA: {
1369                 struct fsl_diu_data *data = mfbi->parent;
1370
1371                 if (copy_from_user(data->gamma, buf, sizeof(data->gamma)))
1372                         return -EFAULT;
1373                 setbits32(&data->diu_reg->gamma, 0); /* Force table reload */
1374                 break;
1375         }
1376         case MFB_GET_GAMMA: {
1377                 struct fsl_diu_data *data = mfbi->parent;
1378
1379                 if (copy_to_user(buf, data->gamma, sizeof(data->gamma)))
1380                         return -EFAULT;
1381                 break;
1382         }
1383 #endif
1384         default:
1385                 dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
1386                 return -ENOIOCTLCMD;
1387         }
1388
1389         return 0;
1390 }
1391
1392 static inline void fsl_diu_enable_interrupts(struct fsl_diu_data *data)
1393 {
1394         u32 int_mask = INT_UNDRUN; /* enable underrun detection */
1395
1396         if (IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
1397                 int_mask |= INT_VSYNC; /* enable vertical sync */
1398
1399         clrbits32(&data->diu_reg->int_mask, int_mask);
1400 }
1401
1402 /* turn on fb if count == 1
1403  */
1404 static int fsl_diu_open(struct fb_info *info, int user)
1405 {
1406         struct mfb_info *mfbi = info->par;
1407         int res = 0;
1408
1409         /* free boot splash memory on first /dev/fb0 open */
1410         if ((mfbi->index == PLANE0) && diu_ops.release_bootmem)
1411                 diu_ops.release_bootmem();
1412
1413         spin_lock(&diu_lock);
1414         mfbi->count++;
1415         if (mfbi->count == 1) {
1416                 fsl_diu_check_var(&info->var, info);
1417                 res = fsl_diu_set_par(info);
1418                 if (res < 0)
1419                         mfbi->count--;
1420                 else {
1421                         fsl_diu_enable_interrupts(mfbi->parent);
1422                         fsl_diu_enable_panel(info);
1423                 }
1424         }
1425
1426         spin_unlock(&diu_lock);
1427         return res;
1428 }
1429
1430 /* turn off fb if count == 0
1431  */
1432 static int fsl_diu_release(struct fb_info *info, int user)
1433 {
1434         struct mfb_info *mfbi = info->par;
1435         int res = 0;
1436
1437         spin_lock(&diu_lock);
1438         mfbi->count--;
1439         if (mfbi->count == 0) {
1440                 struct fsl_diu_data *data = mfbi->parent;
1441                 bool disable = true;
1442                 int i;
1443
1444                 /* Disable interrupts only if all AOIs are closed */
1445                 for (i = 0; i < NUM_AOIS; i++) {
1446                         struct mfb_info *mi = data->fsl_diu_info[i].par;
1447
1448                         if (mi->count)
1449                                 disable = false;
1450                 }
1451                 if (disable)
1452                         out_be32(&data->diu_reg->int_mask, 0xffffffff);
1453                 fsl_diu_disable_panel(info);
1454         }
1455
1456         spin_unlock(&diu_lock);
1457         return res;
1458 }
1459
1460 static struct fb_ops fsl_diu_ops = {
1461         .owner = THIS_MODULE,
1462         .fb_check_var = fsl_diu_check_var,
1463         .fb_set_par = fsl_diu_set_par,
1464         .fb_setcolreg = fsl_diu_setcolreg,
1465         .fb_pan_display = fsl_diu_pan_display,
1466         .fb_fillrect = cfb_fillrect,
1467         .fb_copyarea = cfb_copyarea,
1468         .fb_imageblit = cfb_imageblit,
1469         .fb_ioctl = fsl_diu_ioctl,
1470         .fb_open = fsl_diu_open,
1471         .fb_release = fsl_diu_release,
1472         .fb_cursor = fsl_diu_cursor,
1473 };
1474
1475 static int install_fb(struct fb_info *info)
1476 {
1477         int rc;
1478         struct mfb_info *mfbi = info->par;
1479         struct fsl_diu_data *data = mfbi->parent;
1480         const char *aoi_mode, *init_aoi_mode = "320x240";
1481         struct fb_videomode *db = fsl_diu_mode_db;
1482         unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
1483         int has_default_mode = 1;
1484
1485         info->var.activate = FB_ACTIVATE_NOW;
1486         info->fbops = &fsl_diu_ops;
1487         info->flags = FBINFO_DEFAULT | FBINFO_VIRTFB | FBINFO_PARTIAL_PAN_OK |
1488                 FBINFO_READS_FAST;
1489         info->pseudo_palette = mfbi->pseudo_palette;
1490
1491         rc = fb_alloc_cmap(&info->cmap, 16, 0);
1492         if (rc)
1493                 return rc;
1494
1495         if (mfbi->index == PLANE0) {
1496                 if (data->has_edid) {
1497                         /* Now build modedb from EDID */
1498                         fb_edid_to_monspecs(data->edid_data, &info->monspecs);
1499                         fb_videomode_to_modelist(info->monspecs.modedb,
1500                                                  info->monspecs.modedb_len,
1501                                                  &info->modelist);
1502                         db = info->monspecs.modedb;
1503                         dbsize = info->monspecs.modedb_len;
1504                 }
1505                 aoi_mode = fb_mode;
1506         } else {
1507                 aoi_mode = init_aoi_mode;
1508         }
1509         rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
1510                           default_bpp);
1511         if (!rc) {
1512                 /*
1513                  * For plane 0 we continue and look into
1514                  * driver's internal modedb.
1515                  */
1516                 if ((mfbi->index == PLANE0) && data->has_edid)
1517                         has_default_mode = 0;
1518                 else
1519                         return -EINVAL;
1520         }
1521
1522         if (!has_default_mode) {
1523                 rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
1524                         ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
1525                 if (rc)
1526                         has_default_mode = 1;
1527         }
1528
1529         /* Still not found, use preferred mode from database if any */
1530         if (!has_default_mode && info->monspecs.modedb) {
1531                 struct fb_monspecs *specs = &info->monspecs;
1532                 struct fb_videomode *modedb = &specs->modedb[0];
1533
1534                 /*
1535                  * Get preferred timing. If not found,
1536                  * first mode in database will be used.
1537                  */
1538                 if (specs->misc & FB_MISC_1ST_DETAIL) {
1539                         int i;
1540
1541                         for (i = 0; i < specs->modedb_len; i++) {
1542                                 if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
1543                                         modedb = &specs->modedb[i];
1544                                         break;
1545                                 }
1546                         }
1547                 }
1548
1549                 info->var.bits_per_pixel = default_bpp;
1550                 fb_videomode_to_var(&info->var, modedb);
1551         }
1552
1553         if (fsl_diu_check_var(&info->var, info)) {
1554                 dev_err(info->dev, "fsl_diu_check_var failed\n");
1555                 unmap_video_memory(info);
1556                 fb_dealloc_cmap(&info->cmap);
1557                 return -EINVAL;
1558         }
1559
1560         if (register_framebuffer(info) < 0) {
1561                 dev_err(info->dev, "register_framebuffer failed\n");
1562                 unmap_video_memory(info);
1563                 fb_dealloc_cmap(&info->cmap);
1564                 return -EINVAL;
1565         }
1566
1567         mfbi->registered = 1;
1568         dev_info(info->dev, "%s registered successfully\n", mfbi->id);
1569
1570         return 0;
1571 }
1572
1573 static void uninstall_fb(struct fb_info *info)
1574 {
1575         struct mfb_info *mfbi = info->par;
1576
1577         if (!mfbi->registered)
1578                 return;
1579
1580         unregister_framebuffer(info);
1581         unmap_video_memory(info);
1582         if (&info->cmap)
1583                 fb_dealloc_cmap(&info->cmap);
1584
1585         mfbi->registered = 0;
1586 }
1587
1588 static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
1589 {
1590         struct diu __iomem *hw = dev_id;
1591         uint32_t status = in_be32(&hw->int_status);
1592
1593         if (status) {
1594                 /* This is the workaround for underrun */
1595                 if (status & INT_UNDRUN) {
1596                         out_be32(&hw->diu_mode, 0);
1597                         udelay(1);
1598                         out_be32(&hw->diu_mode, 1);
1599                 }
1600 #if defined(CONFIG_NOT_COHERENT_CACHE)
1601                 else if (status & INT_VSYNC) {
1602                         unsigned int i;
1603
1604                         for (i = 0; i < coherence_data_size;
1605                                 i += d_cache_line_size)
1606                                 __asm__ __volatile__ (
1607                                         "dcbz 0, %[input]"
1608                                 ::[input]"r"(&coherence_data[i]));
1609                 }
1610 #endif
1611                 return IRQ_HANDLED;
1612         }
1613         return IRQ_NONE;
1614 }
1615
1616 #ifdef CONFIG_PM
1617 /*
1618  * Power management hooks. Note that we won't be called from IRQ context,
1619  * unlike the blank functions above, so we may sleep.
1620  */
1621 static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
1622 {
1623         struct fsl_diu_data *data;
1624
1625         data = dev_get_drvdata(&ofdev->dev);
1626         disable_lcdc(data->fsl_diu_info);
1627
1628         return 0;
1629 }
1630
1631 static int fsl_diu_resume(struct platform_device *ofdev)
1632 {
1633         struct fsl_diu_data *data;
1634         unsigned int i;
1635
1636         data = dev_get_drvdata(&ofdev->dev);
1637
1638         fsl_diu_enable_interrupts(data);
1639         update_lcdc(data->fsl_diu_info);
1640         for (i = 0; i < NUM_AOIS; i++) {
1641                 if (data->mfb[i].count)
1642                         fsl_diu_enable_panel(&data->fsl_diu_info[i]);
1643         }
1644
1645         return 0;
1646 }
1647
1648 #else
1649 #define fsl_diu_suspend NULL
1650 #define fsl_diu_resume NULL
1651 #endif                          /* CONFIG_PM */
1652
1653 static ssize_t store_monitor(struct device *device,
1654         struct device_attribute *attr, const char *buf, size_t count)
1655 {
1656         enum fsl_diu_monitor_port old_monitor_port;
1657         struct fsl_diu_data *data =
1658                 container_of(attr, struct fsl_diu_data, dev_attr);
1659
1660         old_monitor_port = data->monitor_port;
1661         data->monitor_port = fsl_diu_name_to_port(buf);
1662
1663         if (old_monitor_port != data->monitor_port) {
1664                 /* All AOIs need adjust pixel format
1665                  * fsl_diu_set_par only change the pixsel format here
1666                  * unlikely to fail. */
1667                 unsigned int i;
1668
1669                 for (i=0; i < NUM_AOIS; i++)
1670                         fsl_diu_set_par(&data->fsl_diu_info[i]);
1671         }
1672         return count;
1673 }
1674
1675 static ssize_t show_monitor(struct device *device,
1676         struct device_attribute *attr, char *buf)
1677 {
1678         struct fsl_diu_data *data =
1679                 container_of(attr, struct fsl_diu_data, dev_attr);
1680
1681         switch (data->monitor_port) {
1682         case FSL_DIU_PORT_DVI:
1683                 return sprintf(buf, "DVI\n");
1684         case FSL_DIU_PORT_LVDS:
1685                 return sprintf(buf, "Single-link LVDS\n");
1686         case FSL_DIU_PORT_DLVDS:
1687                 return sprintf(buf, "Dual-link LVDS\n");
1688         }
1689
1690         return 0;
1691 }
1692
1693 static int fsl_diu_probe(struct platform_device *pdev)
1694 {
1695         struct device_node *np = pdev->dev.of_node;
1696         struct mfb_info *mfbi;
1697         struct fsl_diu_data *data;
1698         dma_addr_t dma_addr; /* DMA addr of fsl_diu_data struct */
1699         const void *prop;
1700         unsigned int i;
1701         int ret;
1702
1703         data = dmam_alloc_coherent(&pdev->dev, sizeof(struct fsl_diu_data),
1704                                    &dma_addr, GFP_DMA | __GFP_ZERO);
1705         if (!data)
1706                 return -ENOMEM;
1707         data->dma_addr = dma_addr;
1708
1709         /*
1710          * dma_alloc_coherent() uses a page allocator, so the address is
1711          * always page-aligned.  We need the memory to be 32-byte aligned,
1712          * so that's good.  However, if one day the allocator changes, we
1713          * need to catch that.  It's not worth the effort to handle unaligned
1714          * alloctions now because it's highly unlikely to ever be a problem.
1715          */
1716         if ((unsigned long)data & 31) {
1717                 dev_err(&pdev->dev, "misaligned allocation");
1718                 ret = -ENOMEM;
1719                 goto error;
1720         }
1721
1722         spin_lock_init(&data->reg_lock);
1723
1724         for (i = 0; i < NUM_AOIS; i++) {
1725                 struct fb_info *info = &data->fsl_diu_info[i];
1726
1727                 info->device = &pdev->dev;
1728                 info->par = &data->mfb[i];
1729
1730                 /*
1731                  * We store the physical address of the AD in the reserved
1732                  * 'paddr' field of the AD itself.
1733                  */
1734                 data->ad[i].paddr = DMA_ADDR(data, ad[i]);
1735
1736                 info->fix.smem_start = 0;
1737
1738                 /* Initialize the AOI data structure */
1739                 mfbi = info->par;
1740                 memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
1741                 mfbi->parent = data;
1742                 mfbi->ad = &data->ad[i];
1743         }
1744
1745         /* Get the EDID data from the device tree, if present */
1746         prop = of_get_property(np, "edid", &ret);
1747         if (prop && ret == EDID_LENGTH) {
1748                 memcpy(data->edid_data, prop, EDID_LENGTH);
1749                 data->has_edid = true;
1750         }
1751
1752         data->diu_reg = of_iomap(np, 0);
1753         if (!data->diu_reg) {
1754                 dev_err(&pdev->dev, "cannot map DIU registers\n");
1755                 ret = -EFAULT;
1756                 goto error;
1757         }
1758
1759         /* Get the IRQ of the DIU */
1760         data->irq = irq_of_parse_and_map(np, 0);
1761
1762         if (!data->irq) {
1763                 dev_err(&pdev->dev, "could not get DIU IRQ\n");
1764                 ret = -EINVAL;
1765                 goto error;
1766         }
1767         data->monitor_port = monitor_port;
1768
1769         /* Initialize the dummy Area Descriptor */
1770         data->dummy_ad.addr = cpu_to_le32(DMA_ADDR(data, dummy_aoi));
1771         data->dummy_ad.pix_fmt = 0x88882317;
1772         data->dummy_ad.src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
1773         data->dummy_ad.aoi_size = cpu_to_le32((4 << 16) |  2);
1774         data->dummy_ad.offset_xyi = 0;
1775         data->dummy_ad.offset_xyd = 0;
1776         data->dummy_ad.next_ad = 0;
1777         data->dummy_ad.paddr = DMA_ADDR(data, dummy_ad);
1778
1779         /*
1780          * Let DIU continue to display splash screen if it was pre-initialized
1781          * by the bootloader; otherwise, clear the display.
1782          */
1783         if (in_be32(&data->diu_reg->diu_mode) == MFB_MODE0)
1784                 out_be32(&data->diu_reg->desc[0], 0);
1785
1786         out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr);
1787         out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr);
1788
1789         /*
1790          * Older versions of U-Boot leave interrupts enabled, so disable
1791          * all of them and clear the status register.
1792          */
1793         out_be32(&data->diu_reg->int_mask, 0xffffffff);
1794         in_be32(&data->diu_reg->int_status);
1795
1796         ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb",
1797                           data->diu_reg);
1798         if (ret) {
1799                 dev_err(&pdev->dev, "could not claim irq\n");
1800                 goto error;
1801         }
1802
1803         for (i = 0; i < NUM_AOIS; i++) {
1804                 ret = install_fb(&data->fsl_diu_info[i]);
1805                 if (ret) {
1806                         dev_err(&pdev->dev, "could not register fb %d\n", i);
1807                         free_irq(data->irq, data->diu_reg);
1808                         goto error;
1809                 }
1810         }
1811
1812         sysfs_attr_init(&data->dev_attr.attr);
1813         data->dev_attr.attr.name = "monitor";
1814         data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
1815         data->dev_attr.show = show_monitor;
1816         data->dev_attr.store = store_monitor;
1817         ret = device_create_file(&pdev->dev, &data->dev_attr);
1818         if (ret) {
1819                 dev_err(&pdev->dev, "could not create sysfs file %s\n",
1820                         data->dev_attr.attr.name);
1821         }
1822
1823         dev_set_drvdata(&pdev->dev, data);
1824         return 0;
1825
1826 error:
1827         for (i = 0; i < NUM_AOIS; i++)
1828                 uninstall_fb(&data->fsl_diu_info[i]);
1829
1830         iounmap(data->diu_reg);
1831
1832         return ret;
1833 }
1834
1835 static int fsl_diu_remove(struct platform_device *pdev)
1836 {
1837         struct fsl_diu_data *data;
1838         int i;
1839
1840         data = dev_get_drvdata(&pdev->dev);
1841         disable_lcdc(&data->fsl_diu_info[0]);
1842
1843         free_irq(data->irq, data->diu_reg);
1844
1845         for (i = 0; i < NUM_AOIS; i++)
1846                 uninstall_fb(&data->fsl_diu_info[i]);
1847
1848         iounmap(data->diu_reg);
1849
1850         return 0;
1851 }
1852
1853 #ifndef MODULE
1854 static int __init fsl_diu_setup(char *options)
1855 {
1856         char *opt;
1857         unsigned long val;
1858
1859         if (!options || !*options)
1860                 return 0;
1861
1862         while ((opt = strsep(&options, ",")) != NULL) {
1863                 if (!*opt)
1864                         continue;
1865                 if (!strncmp(opt, "monitor=", 8)) {
1866                         monitor_port = fsl_diu_name_to_port(opt + 8);
1867                 } else if (!strncmp(opt, "bpp=", 4)) {
1868                         if (!kstrtoul(opt + 4, 10, &val))
1869                                 default_bpp = val;
1870                 } else
1871                         fb_mode = opt;
1872         }
1873
1874         return 0;
1875 }
1876 #endif
1877
1878 static struct of_device_id fsl_diu_match[] = {
1879 #ifdef CONFIG_PPC_MPC512x
1880         {
1881                 .compatible = "fsl,mpc5121-diu",
1882         },
1883 #endif
1884         {
1885                 .compatible = "fsl,diu",
1886         },
1887         {}
1888 };
1889 MODULE_DEVICE_TABLE(of, fsl_diu_match);
1890
1891 static struct platform_driver fsl_diu_driver = {
1892         .driver = {
1893                 .name = "fsl-diu-fb",
1894                 .of_match_table = fsl_diu_match,
1895         },
1896         .probe          = fsl_diu_probe,
1897         .remove         = fsl_diu_remove,
1898         .suspend        = fsl_diu_suspend,
1899         .resume         = fsl_diu_resume,
1900 };
1901
1902 static int __init fsl_diu_init(void)
1903 {
1904 #ifdef CONFIG_NOT_COHERENT_CACHE
1905         struct device_node *np;
1906         const u32 *prop;
1907 #endif
1908         int ret;
1909 #ifndef MODULE
1910         char *option;
1911
1912         /*
1913          * For kernel boot options (in 'video=xxxfb:<options>' format)
1914          */
1915         if (fb_get_options("fslfb", &option))
1916                 return -ENODEV;
1917         fsl_diu_setup(option);
1918 #else
1919         monitor_port = fsl_diu_name_to_port(monitor_string);
1920 #endif
1921
1922         /*
1923          * Must to verify set_pixel_clock. If not implement on platform,
1924          * then that means that there is no platform support for the DIU.
1925          */
1926         if (!diu_ops.set_pixel_clock)
1927                 return -ENODEV;
1928
1929         pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
1930
1931 #ifdef CONFIG_NOT_COHERENT_CACHE
1932         np = of_find_node_by_type(NULL, "cpu");
1933         if (!np) {
1934                 pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
1935                 return -ENODEV;
1936         }
1937
1938         prop = of_get_property(np, "d-cache-size", NULL);
1939         if (prop == NULL) {
1940                 pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
1941                        "in 'cpu' node\n");
1942                 of_node_put(np);
1943                 return -ENODEV;
1944         }
1945
1946         /*
1947          * Freescale PLRU requires 13/8 times the cache size to do a proper
1948          * displacement flush
1949          */
1950         coherence_data_size = be32_to_cpup(prop) * 13;
1951         coherence_data_size /= 8;
1952
1953         pr_debug("fsl-diu-fb: coherence data size is %zu bytes\n",
1954                  coherence_data_size);
1955
1956         prop = of_get_property(np, "d-cache-line-size", NULL);
1957         if (prop == NULL) {
1958                 pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
1959                        "in 'cpu' node\n");
1960                 of_node_put(np);
1961                 return -ENODEV;
1962         }
1963         d_cache_line_size = be32_to_cpup(prop);
1964
1965         pr_debug("fsl-diu-fb: cache lines size is %u bytes\n",
1966                  d_cache_line_size);
1967
1968         of_node_put(np);
1969         coherence_data = vmalloc(coherence_data_size);
1970         if (!coherence_data) {
1971                 pr_err("fsl-diu-fb: could not allocate coherence data "
1972                        "(size=%zu)\n", coherence_data_size);
1973                 return -ENOMEM;
1974         }
1975
1976 #endif
1977
1978         ret = platform_driver_register(&fsl_diu_driver);
1979         if (ret) {
1980                 pr_err("fsl-diu-fb: failed to register platform driver\n");
1981 #if defined(CONFIG_NOT_COHERENT_CACHE)
1982                 vfree(coherence_data);
1983 #endif
1984         }
1985         return ret;
1986 }
1987
1988 static void __exit fsl_diu_exit(void)
1989 {
1990         platform_driver_unregister(&fsl_diu_driver);
1991 #if defined(CONFIG_NOT_COHERENT_CACHE)
1992         vfree(coherence_data);
1993 #endif
1994 }
1995
1996 module_init(fsl_diu_init);
1997 module_exit(fsl_diu_exit);
1998
1999 MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
2000 MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
2001 MODULE_LICENSE("GPL");
2002
2003 module_param_named(mode, fb_mode, charp, 0);
2004 MODULE_PARM_DESC(mode,
2005         "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
2006 module_param_named(bpp, default_bpp, ulong, 0);
2007 MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
2008 module_param_named(monitor, monitor_string, charp, 0);
2009 MODULE_PARM_DESC(monitor, "Specify the monitor port "
2010         "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");
2011