video/rockchip: rga2: use axi safe reset
[firefly-linux-kernel-4.4.55.git] / drivers / video / fbdev / amba-clcd.c
1 /*
2  *  linux/drivers/video/amba-clcd.c
3  *
4  * Copyright (C) 2001 ARM Limited, by David A Rusling
5  * Updated to 2.5, Deep Blue Solutions Ltd.
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file COPYING in the main directory of this archive
9  * for more details.
10  *
11  *  ARM PrimeCell PL110 Color LCD Controller
12  */
13 #include <linux/dma-mapping.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/slab.h>
19 #include <linux/delay.h>
20 #include <linux/mm.h>
21 #include <linux/fb.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/list.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/clcd.h>
27 #include <linux/bitops.h>
28 #include <linux/clk.h>
29 #include <linux/hardirq.h>
30 #include <linux/of.h>
31 #include <linux/of_address.h>
32 #include <linux/of_graph.h>
33 #include <video/display_timing.h>
34 #include <video/of_display_timing.h>
35 #include <video/videomode.h>
36
37 #include <asm/sizes.h>
38
39 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
40
41 /* This is limited to 16 characters when displayed by X startup */
42 static const char *clcd_name = "CLCD FB";
43
44 /*
45  * Unfortunately, the enable/disable functions may be called either from
46  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
47  */
48 static inline void clcdfb_sleep(unsigned int ms)
49 {
50         if (in_atomic()) {
51                 mdelay(ms);
52         } else {
53                 msleep(ms);
54         }
55 }
56
57 static inline void clcdfb_set_start(struct clcd_fb *fb)
58 {
59         unsigned long ustart = fb->fb.fix.smem_start;
60         unsigned long lstart;
61
62         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
63         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
64
65         writel(ustart, fb->regs + CLCD_UBAS);
66         writel(lstart, fb->regs + CLCD_LBAS);
67 }
68
69 static void clcdfb_disable(struct clcd_fb *fb)
70 {
71         u32 val;
72
73         if (fb->board->disable)
74                 fb->board->disable(fb);
75
76         val = readl(fb->regs + fb->off_cntl);
77         if (val & CNTL_LCDPWR) {
78                 val &= ~CNTL_LCDPWR;
79                 writel(val, fb->regs + fb->off_cntl);
80
81                 clcdfb_sleep(20);
82         }
83         if (val & CNTL_LCDEN) {
84                 val &= ~CNTL_LCDEN;
85                 writel(val, fb->regs + fb->off_cntl);
86         }
87
88         /*
89          * Disable CLCD clock source.
90          */
91         if (fb->clk_enabled) {
92                 fb->clk_enabled = false;
93                 clk_disable(fb->clk);
94         }
95 }
96
97 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
98 {
99         /*
100          * Enable the CLCD clock source.
101          */
102         if (!fb->clk_enabled) {
103                 fb->clk_enabled = true;
104                 clk_enable(fb->clk);
105         }
106
107         /*
108          * Bring up by first enabling..
109          */
110         cntl |= CNTL_LCDEN;
111         writel(cntl, fb->regs + fb->off_cntl);
112
113         clcdfb_sleep(20);
114
115         /*
116          * and now apply power.
117          */
118         cntl |= CNTL_LCDPWR;
119         writel(cntl, fb->regs + fb->off_cntl);
120
121         /*
122          * finally, enable the interface.
123          */
124         if (fb->board->enable)
125                 fb->board->enable(fb);
126 }
127
128 static int
129 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
130 {
131         u32 caps;
132         int ret = 0;
133
134         if (fb->panel->caps && fb->board->caps)
135                 caps = fb->panel->caps & fb->board->caps;
136         else {
137                 /* Old way of specifying what can be used */
138                 caps = fb->panel->cntl & CNTL_BGR ?
139                         CLCD_CAP_BGR : CLCD_CAP_RGB;
140                 /* But mask out 444 modes as they weren't supported */
141                 caps &= ~CLCD_CAP_444;
142         }
143
144         /* Only TFT panels can do RGB888/BGR888 */
145         if (!(fb->panel->cntl & CNTL_LCDTFT))
146                 caps &= ~CLCD_CAP_888;
147
148         memset(&var->transp, 0, sizeof(var->transp));
149
150         var->red.msb_right = 0;
151         var->green.msb_right = 0;
152         var->blue.msb_right = 0;
153
154         switch (var->bits_per_pixel) {
155         case 1:
156         case 2:
157         case 4:
158         case 8:
159                 /* If we can't do 5551, reject */
160                 caps &= CLCD_CAP_5551;
161                 if (!caps) {
162                         ret = -EINVAL;
163                         break;
164                 }
165
166                 var->red.length         = var->bits_per_pixel;
167                 var->red.offset         = 0;
168                 var->green.length       = var->bits_per_pixel;
169                 var->green.offset       = 0;
170                 var->blue.length        = var->bits_per_pixel;
171                 var->blue.offset        = 0;
172                 break;
173
174         case 16:
175                 /* If we can't do 444, 5551 or 565, reject */
176                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
177                         ret = -EINVAL;
178                         break;
179                 }
180
181                 /*
182                  * Green length can be 4, 5 or 6 depending whether
183                  * we're operating in 444, 5551 or 565 mode.
184                  */
185                 if (var->green.length == 4 && caps & CLCD_CAP_444)
186                         caps &= CLCD_CAP_444;
187                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
188                         caps &= CLCD_CAP_5551;
189                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
190                         caps &= CLCD_CAP_565;
191                 else {
192                         /*
193                          * PL110 officially only supports RGB555,
194                          * but may be wired up to allow RGB565.
195                          */
196                         if (caps & CLCD_CAP_565) {
197                                 var->green.length = 6;
198                                 caps &= CLCD_CAP_565;
199                         } else if (caps & CLCD_CAP_5551) {
200                                 var->green.length = 5;
201                                 caps &= CLCD_CAP_5551;
202                         } else {
203                                 var->green.length = 4;
204                                 caps &= CLCD_CAP_444;
205                         }
206                 }
207
208                 if (var->green.length >= 5) {
209                         var->red.length = 5;
210                         var->blue.length = 5;
211                 } else {
212                         var->red.length = 4;
213                         var->blue.length = 4;
214                 }
215                 break;
216         case 32:
217                 /* If we can't do 888, reject */
218                 caps &= CLCD_CAP_888;
219                 if (!caps) {
220                         ret = -EINVAL;
221                         break;
222                 }
223
224                 var->red.length = 8;
225                 var->green.length = 8;
226                 var->blue.length = 8;
227                 break;
228         default:
229                 ret = -EINVAL;
230                 break;
231         }
232
233         /*
234          * >= 16bpp displays have separate colour component bitfields
235          * encoded in the pixel data.  Calculate their position from
236          * the bitfield length defined above.
237          */
238         if (ret == 0 && var->bits_per_pixel >= 16) {
239                 bool bgr, rgb;
240
241                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
242                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
243
244                 if (!bgr && !rgb)
245                         /*
246                          * The requested format was not possible, try just
247                          * our capabilities.  One of BGR or RGB must be
248                          * supported.
249                          */
250                         bgr = caps & CLCD_CAP_BGR;
251
252                 if (bgr) {
253                         var->blue.offset = 0;
254                         var->green.offset = var->blue.offset + var->blue.length;
255                         var->red.offset = var->green.offset + var->green.length;
256                 } else {
257                         var->red.offset = 0;
258                         var->green.offset = var->red.offset + var->red.length;
259                         var->blue.offset = var->green.offset + var->green.length;
260                 }
261         }
262
263         return ret;
264 }
265
266 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
267 {
268         struct clcd_fb *fb = to_clcd(info);
269         int ret = -EINVAL;
270
271         if (fb->board->check)
272                 ret = fb->board->check(fb, var);
273
274         if (ret == 0 &&
275             var->xres_virtual * var->bits_per_pixel / 8 *
276             var->yres_virtual > fb->fb.fix.smem_len)
277                 ret = -EINVAL;
278
279         if (ret == 0)
280                 ret = clcdfb_set_bitfields(fb, var);
281
282         return ret;
283 }
284
285 static int clcdfb_set_par(struct fb_info *info)
286 {
287         struct clcd_fb *fb = to_clcd(info);
288         struct clcd_regs regs;
289
290         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
291                                  fb->fb.var.bits_per_pixel / 8;
292
293         if (fb->fb.var.bits_per_pixel <= 8)
294                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
295         else
296                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
297
298         fb->board->decode(fb, &regs);
299
300         clcdfb_disable(fb);
301
302         writel(regs.tim0, fb->regs + CLCD_TIM0);
303         writel(regs.tim1, fb->regs + CLCD_TIM1);
304         writel(regs.tim2, fb->regs + CLCD_TIM2);
305         writel(regs.tim3, fb->regs + CLCD_TIM3);
306
307         clcdfb_set_start(fb);
308
309         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
310
311         fb->clcd_cntl = regs.cntl;
312
313         clcdfb_enable(fb, regs.cntl);
314
315 #ifdef DEBUG
316         printk(KERN_INFO
317                "CLCD: Registers set to\n"
318                "  %08x %08x %08x %08x\n"
319                "  %08x %08x %08x %08x\n",
320                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
321                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
322                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
323                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
324 #endif
325
326         return 0;
327 }
328
329 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
330 {
331         unsigned int mask = (1 << bf->length) - 1;
332
333         return (val >> (16 - bf->length) & mask) << bf->offset;
334 }
335
336 /*
337  *  Set a single color register. The values supplied have a 16 bit
338  *  magnitude.  Return != 0 for invalid regno.
339  */
340 static int
341 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
342                  unsigned int blue, unsigned int transp, struct fb_info *info)
343 {
344         struct clcd_fb *fb = to_clcd(info);
345
346         if (regno < 16)
347                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
348                                   convert_bitfield(blue, &fb->fb.var.blue) |
349                                   convert_bitfield(green, &fb->fb.var.green) |
350                                   convert_bitfield(red, &fb->fb.var.red);
351
352         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
353                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
354                 u32 val, mask, newval;
355
356                 newval  = (red >> 11)  & 0x001f;
357                 newval |= (green >> 6) & 0x03e0;
358                 newval |= (blue >> 1)  & 0x7c00;
359
360                 /*
361                  * 3.2.11: if we're configured for big endian
362                  * byte order, the palette entries are swapped.
363                  */
364                 if (fb->clcd_cntl & CNTL_BEBO)
365                         regno ^= 1;
366
367                 if (regno & 1) {
368                         newval <<= 16;
369                         mask = 0x0000ffff;
370                 } else {
371                         mask = 0xffff0000;
372                 }
373
374                 val = readl(fb->regs + hw_reg) & mask;
375                 writel(val | newval, fb->regs + hw_reg);
376         }
377
378         return regno > 255;
379 }
380
381 /*
382  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
383  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
384  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
385  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
386  *  and powerdown modes on hardware that supports disabling hsync/vsync:
387  *    blank_mode == 2: suspend vsync
388  *    blank_mode == 3: suspend hsync
389  *    blank_mode == 4: powerdown
390  */
391 static int clcdfb_blank(int blank_mode, struct fb_info *info)
392 {
393         struct clcd_fb *fb = to_clcd(info);
394
395         if (blank_mode != 0) {
396                 clcdfb_disable(fb);
397         } else {
398                 clcdfb_enable(fb, fb->clcd_cntl);
399         }
400         return 0;
401 }
402
403 static int clcdfb_mmap(struct fb_info *info,
404                        struct vm_area_struct *vma)
405 {
406         struct clcd_fb *fb = to_clcd(info);
407         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
408         int ret = -EINVAL;
409
410         len = info->fix.smem_len;
411
412         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
413             fb->board->mmap)
414                 ret = fb->board->mmap(fb, vma);
415
416         return ret;
417 }
418
419 static struct fb_ops clcdfb_ops = {
420         .owner          = THIS_MODULE,
421         .fb_check_var   = clcdfb_check_var,
422         .fb_set_par     = clcdfb_set_par,
423         .fb_setcolreg   = clcdfb_setcolreg,
424         .fb_blank       = clcdfb_blank,
425         .fb_fillrect    = cfb_fillrect,
426         .fb_copyarea    = cfb_copyarea,
427         .fb_imageblit   = cfb_imageblit,
428         .fb_mmap        = clcdfb_mmap,
429 };
430
431 static int clcdfb_register(struct clcd_fb *fb)
432 {
433         int ret;
434
435         /*
436          * ARM PL111 always has IENB at 0x1c; it's only PL110
437          * which is reversed on some platforms.
438          */
439         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
440                 fb->off_ienb = CLCD_PL111_IENB;
441                 fb->off_cntl = CLCD_PL111_CNTL;
442         } else {
443 #ifdef CONFIG_ARCH_VERSATILE
444                 fb->off_ienb = CLCD_PL111_IENB;
445                 fb->off_cntl = CLCD_PL111_CNTL;
446 #else
447                 fb->off_ienb = CLCD_PL110_IENB;
448                 fb->off_cntl = CLCD_PL110_CNTL;
449 #endif
450         }
451
452         fb->clk = clk_get(&fb->dev->dev, NULL);
453         if (IS_ERR(fb->clk)) {
454                 ret = PTR_ERR(fb->clk);
455                 goto out;
456         }
457
458         ret = clk_prepare(fb->clk);
459         if (ret)
460                 goto free_clk;
461
462         fb->fb.device           = &fb->dev->dev;
463
464         fb->fb.fix.mmio_start   = fb->dev->res.start;
465         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
466
467         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
468         if (!fb->regs) {
469                 printk(KERN_ERR "CLCD: unable to remap registers\n");
470                 ret = -ENOMEM;
471                 goto clk_unprep;
472         }
473
474         fb->fb.fbops            = &clcdfb_ops;
475         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
476         fb->fb.pseudo_palette   = fb->cmap;
477
478         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
479         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
480         fb->fb.fix.type_aux     = 0;
481         fb->fb.fix.xpanstep     = 0;
482         fb->fb.fix.ypanstep     = 0;
483         fb->fb.fix.ywrapstep    = 0;
484         fb->fb.fix.accel        = FB_ACCEL_NONE;
485
486         fb->fb.var.xres         = fb->panel->mode.xres;
487         fb->fb.var.yres         = fb->panel->mode.yres;
488         fb->fb.var.xres_virtual = fb->panel->mode.xres;
489         fb->fb.var.yres_virtual = fb->panel->mode.yres;
490         fb->fb.var.bits_per_pixel = fb->panel->bpp;
491         fb->fb.var.grayscale    = fb->panel->grayscale;
492         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
493         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
494         fb->fb.var.right_margin = fb->panel->mode.right_margin;
495         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
496         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
497         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
498         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
499         fb->fb.var.sync         = fb->panel->mode.sync;
500         fb->fb.var.vmode        = fb->panel->mode.vmode;
501         fb->fb.var.activate     = FB_ACTIVATE_NOW;
502         fb->fb.var.nonstd       = 0;
503         fb->fb.var.height       = fb->panel->height;
504         fb->fb.var.width        = fb->panel->width;
505         fb->fb.var.accel_flags  = 0;
506
507         fb->fb.monspecs.hfmin   = 0;
508         fb->fb.monspecs.hfmax   = 100000;
509         fb->fb.monspecs.vfmin   = 0;
510         fb->fb.monspecs.vfmax   = 400;
511         fb->fb.monspecs.dclkmin = 1000000;
512         fb->fb.monspecs.dclkmax = 100000000;
513
514         /*
515          * Make sure that the bitfields are set appropriately.
516          */
517         clcdfb_set_bitfields(fb, &fb->fb.var);
518
519         /*
520          * Allocate colourmap.
521          */
522         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
523         if (ret)
524                 goto unmap;
525
526         /*
527          * Ensure interrupts are disabled.
528          */
529         writel(0, fb->regs + fb->off_ienb);
530
531         fb_set_var(&fb->fb, &fb->fb.var);
532
533         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
534                  fb->board->name, fb->panel->mode.name);
535
536         ret = register_framebuffer(&fb->fb);
537         if (ret == 0)
538                 goto out;
539
540         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
541
542         fb_dealloc_cmap(&fb->fb.cmap);
543  unmap:
544         iounmap(fb->regs);
545  clk_unprep:
546         clk_unprepare(fb->clk);
547  free_clk:
548         clk_put(fb->clk);
549  out:
550         return ret;
551 }
552
553 #ifdef CONFIG_OF
554 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
555                 struct fb_videomode *mode)
556 {
557         int err;
558         struct display_timing timing;
559         struct videomode video;
560
561         err = of_get_display_timing(node, "panel-timing", &timing);
562         if (err)
563                 return err;
564
565         videomode_from_timing(&timing, &video);
566
567         err = fb_videomode_from_videomode(&video, mode);
568         if (err)
569                 return err;
570
571         return 0;
572 }
573
574 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
575 {
576         return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
577                         mode->refresh);
578 }
579
580 static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
581                 struct fb_videomode *mode)
582 {
583         int err;
584         struct device_node *panel;
585         char *name;
586         int len;
587
588         panel = of_graph_get_remote_port_parent(endpoint);
589         if (!panel)
590                 return -ENODEV;
591
592         /* Only directly connected DPI panels supported for now */
593         if (of_device_is_compatible(panel, "panel-dpi"))
594                 err = clcdfb_of_get_dpi_panel_mode(panel, mode);
595         else
596                 err = -ENOENT;
597         if (err)
598                 return err;
599
600         len = clcdfb_snprintf_mode(NULL, 0, mode);
601         name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
602         if (!name)
603                 return -ENOMEM;
604
605         clcdfb_snprintf_mode(name, len + 1, mode);
606         mode->name = name;
607
608         return 0;
609 }
610
611 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
612 {
613         static struct {
614                 unsigned int part;
615                 u32 r0, g0, b0;
616                 u32 caps;
617         } panels[] = {
618                 { 0x110, 1,  7, 13, CLCD_CAP_5551 },
619                 { 0x110, 0,  8, 16, CLCD_CAP_888 },
620                 { 0x111, 4, 14, 20, CLCD_CAP_444 },
621                 { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
622                 { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
623                                     CLCD_CAP_565 },
624                 { 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
625                                     CLCD_CAP_565 | CLCD_CAP_888 },
626         };
627         int i;
628
629         /* Bypass pixel clock divider, data output on the falling edge */
630         fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
631
632         /* TFT display, vert. comp. interrupt at the start of the back porch */
633         fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
634
635         fb->panel->caps = 0;
636
637         /* Match the setup with known variants */
638         for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
639                 if (amba_part(fb->dev) != panels[i].part)
640                         continue;
641                 if (g0 != panels[i].g0)
642                         continue;
643                 if (r0 == panels[i].r0 && b0 == panels[i].b0)
644                         fb->panel->caps = panels[i].caps;
645         }
646
647         return fb->panel->caps ? 0 : -EINVAL;
648 }
649
650 static int clcdfb_of_init_display(struct clcd_fb *fb)
651 {
652         struct device_node *endpoint;
653         int err;
654         unsigned int bpp;
655         u32 max_bandwidth;
656         u32 tft_r0b0g0[3];
657
658         fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
659         if (!fb->panel)
660                 return -ENOMEM;
661
662         endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
663         if (!endpoint)
664                 return -ENODEV;
665
666         err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
667         if (err)
668                 return err;
669
670         err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
671                         &max_bandwidth);
672         if (!err) {
673                 /*
674                  * max_bandwidth is in bytes per second and pixclock in
675                  * pico-seconds, so the maximum allowed bits per pixel is
676                  *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
677                  * Rearrange this calculation to avoid overflow and then ensure
678                  * result is a valid format.
679                  */
680                 bpp = max_bandwidth / (1000 / 8)
681                         / PICOS2KHZ(fb->panel->mode.pixclock);
682                 bpp = rounddown_pow_of_two(bpp);
683                 if (bpp > 32)
684                         bpp = 32;
685         } else
686                 bpp = 32;
687         fb->panel->bpp = bpp;
688
689 #ifdef CONFIG_CPU_BIG_ENDIAN
690         fb->panel->cntl |= CNTL_BEBO;
691 #endif
692         fb->panel->width = -1;
693         fb->panel->height = -1;
694
695         if (of_property_read_u32_array(endpoint,
696                         "arm,pl11x,tft-r0g0b0-pads",
697                         tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
698                 return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
699                                  tft_r0b0g0[1],  tft_r0b0g0[2]);
700
701         return -ENOENT;
702 }
703
704 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
705 {
706         int err;
707         struct device_node *memory;
708         u64 size;
709
710         err = clcdfb_of_init_display(fb);
711         if (err)
712                 return err;
713
714         memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
715         if (!memory)
716                 return -ENODEV;
717
718         fb->fb.screen_base = of_iomap(memory, 0);
719         if (!fb->fb.screen_base)
720                 return -ENOMEM;
721
722         fb->fb.fix.smem_start = of_translate_address(memory,
723                         of_get_address(memory, 0, &size, NULL));
724         fb->fb.fix.smem_len = size;
725
726         return 0;
727 }
728
729 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
730 {
731         unsigned long off, user_size, kernel_size;
732
733
734         off = vma->vm_pgoff << PAGE_SHIFT;
735         user_size = vma->vm_end - vma->vm_start;
736         kernel_size = fb->fb.fix.smem_len;
737
738         if (off >= kernel_size || user_size > (kernel_size - off))
739                 return -ENXIO;
740
741         return remap_pfn_range(vma, vma->vm_start,
742                         __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
743                         user_size,
744                         pgprot_writecombine(vma->vm_page_prot));
745 }
746
747 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
748 {
749         iounmap(fb->fb.screen_base);
750 }
751
752 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
753 {
754         unsigned long framesize;
755         dma_addr_t dma;
756         int err;
757
758         err = clcdfb_of_init_display(fb);
759         if (err)
760                 return err;
761
762         framesize = fb->panel->mode.xres * fb->panel->mode.yres *
763                         fb->panel->bpp / 8;
764         fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
765                         &dma, GFP_KERNEL);
766         if (!fb->fb.screen_base)
767                 return -ENOMEM;
768
769         fb->fb.fix.smem_start = dma;
770         fb->fb.fix.smem_len = framesize;
771
772         return 0;
773 }
774
775 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
776 {
777         return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
778                         fb->fb.fix.smem_start, fb->fb.fix.smem_len);
779 }
780
781 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
782 {
783         dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
784                         fb->fb.screen_base, fb->fb.fix.smem_start);
785 }
786
787 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
788 {
789         struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
790                         GFP_KERNEL);
791         struct device_node *node = dev->dev.of_node;
792
793         if (!board)
794                 return NULL;
795
796         board->name = of_node_full_name(node);
797         board->caps = CLCD_CAP_ALL;
798         board->check = clcdfb_check;
799         board->decode = clcdfb_decode;
800         if (of_find_property(node, "memory-region", NULL)) {
801                 board->setup = clcdfb_of_vram_setup;
802                 board->mmap = clcdfb_of_vram_mmap;
803                 board->remove = clcdfb_of_vram_remove;
804         } else {
805                 board->setup = clcdfb_of_dma_setup;
806                 board->mmap = clcdfb_of_dma_mmap;
807                 board->remove = clcdfb_of_dma_remove;
808         }
809
810         return board;
811 }
812 #else
813 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
814 {
815         return NULL;
816 }
817 #endif
818
819 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
820 {
821         struct clcd_board *board = dev_get_platdata(&dev->dev);
822         struct clcd_fb *fb;
823         int ret;
824
825         if (!board)
826                 board = clcdfb_of_get_board(dev);
827
828         if (!board)
829                 return -EINVAL;
830
831         ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
832         if (ret)
833                 goto out;
834
835         ret = amba_request_regions(dev, NULL);
836         if (ret) {
837                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
838                 goto out;
839         }
840
841         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
842         if (!fb) {
843                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
844                 ret = -ENOMEM;
845                 goto free_region;
846         }
847
848         fb->dev = dev;
849         fb->board = board;
850
851         dev_info(&fb->dev->dev, "PL%03x rev%u at 0x%08llx\n",
852                 amba_part(dev), amba_rev(dev),
853                 (unsigned long long)dev->res.start);
854
855         ret = fb->board->setup(fb);
856         if (ret)
857                 goto free_fb;
858
859         ret = clcdfb_register(fb); 
860         if (ret == 0) {
861                 amba_set_drvdata(dev, fb);
862                 goto out;
863         }
864
865         fb->board->remove(fb);
866  free_fb:
867         kfree(fb);
868  free_region:
869         amba_release_regions(dev);
870  out:
871         return ret;
872 }
873
874 static int clcdfb_remove(struct amba_device *dev)
875 {
876         struct clcd_fb *fb = amba_get_drvdata(dev);
877
878         clcdfb_disable(fb);
879         unregister_framebuffer(&fb->fb);
880         if (fb->fb.cmap.len)
881                 fb_dealloc_cmap(&fb->fb.cmap);
882         iounmap(fb->regs);
883         clk_unprepare(fb->clk);
884         clk_put(fb->clk);
885
886         fb->board->remove(fb);
887
888         kfree(fb);
889
890         amba_release_regions(dev);
891
892         return 0;
893 }
894
895 static struct amba_id clcdfb_id_table[] = {
896         {
897                 .id     = 0x00041110,
898                 .mask   = 0x000ffffe,
899         },
900         { 0, 0 },
901 };
902
903 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
904
905 static struct amba_driver clcd_driver = {
906         .drv            = {
907                 .name   = "clcd-pl11x",
908         },
909         .probe          = clcdfb_probe,
910         .remove         = clcdfb_remove,
911         .id_table       = clcdfb_id_table,
912 };
913
914 static int __init amba_clcdfb_init(void)
915 {
916         if (fb_get_options("ambafb", NULL))
917                 return -ENODEV;
918
919         return amba_driver_register(&clcd_driver);
920 }
921
922 module_init(amba_clcdfb_init);
923
924 static void __exit amba_clcdfb_exit(void)
925 {
926         amba_driver_unregister(&clcd_driver);
927 }
928
929 module_exit(amba_clcdfb_exit);
930
931 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
932 MODULE_LICENSE("GPL");