drivers/usb/phy/phy-qcom-8x16-usb.c

   1 /*
   2  * Copyright (c) 2015, Linaro Limited
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/device.h>
  17 #include <linux/err.h>
  18 #include <linux/extcon.h>
  19 #include <linux/gpio/consumer.h>
  20 #include <linux/io.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/reboot.h>
  25 #include <linux/regulator/consumer.h>
  26 #include <linux/reset.h>
  27 #include <linux/slab.h>
  28 #include <linux/usb.h>
  29 #include <linux/usb/ulpi.h>
  30
  31 #define HSPHY_AHBBURST                  0x0090
  32 #define HSPHY_AHBMODE                   0x0098
  33 #define HSPHY_GENCONFIG                 0x009c
  34 #define HSPHY_GENCONFIG_2               0x00a0
  35
  36 #define HSPHY_USBCMD                    0x0140
  37 #define HSPHY_ULPI_VIEWPORT             0x0170
  38 #define HSPHY_CTRL                      0x0240
  39
  40 #define HSPHY_TXFIFO_IDLE_FORCE_DIS     BIT(4)
  41 #define HSPHY_SESS_VLD_CTRL_EN          BIT(7)
  42 #define HSPHY_POR_ASSERT                BIT(0)
  43 #define HSPHY_RETEN                     BIT(1)
  44
  45 #define HSPHY_SESS_VLD_CTRL             BIT(25)
  46
  47 #define ULPI_PWR_CLK_MNG_REG            0x88
  48 #define ULPI_PWR_OTG_COMP_DISABLE       BIT(0)
  49
  50 #define ULPI_MISC_A                     0x96
  51 #define ULPI_MISC_A_VBUSVLDEXTSEL       BIT(1)
  52 #define ULPI_MISC_A_VBUSVLDEXT          BIT(0)
  53
  54 #define HSPHY_3P3_MIN                   3050000 /* uV */
  55 #define HSPHY_3P3_MAX                   3300000 /* uV */
  56
  57 #define HSPHY_1P8_MIN                   1800000 /* uV */
  58 #define HSPHY_1P8_MAX                   1800000 /* uV */
  59
  60 #define HSPHY_VDD_MIN                   5
  61 #define HSPHY_VDD_MAX                   7
  62
  63 struct phy_8x16 {
  64         struct usb_phy                  phy;
  65         void __iomem                    *regs;
  66         struct clk                      *core_clk;
  67         struct clk                      *iface_clk;
  68         struct regulator                *v3p3;
  69         struct regulator                *v1p8;
  70         struct regulator                *vdd;
  71
  72         struct reset_control            *phy_reset;
  73
  74         struct extcon_dev               *vbus_edev;
  75         struct notifier_block           vbus_notify;
  76
  77         struct gpio_desc                *switch_gpio;
  78         struct notifier_block           reboot_notify;
  79 };
  80
  81 static int phy_8x16_regulators_enable(struct phy_8x16 *qphy)
  82 {
  83         int ret;
  84
  85         ret = regulator_set_voltage(qphy->vdd, HSPHY_VDD_MIN, HSPHY_VDD_MAX);
  86         if (ret)
  87                 return ret;
  88
  89         ret = regulator_enable(qphy->vdd);
  90         if (ret)
  91                 return ret;
  92
  93         ret = regulator_set_voltage(qphy->v3p3, HSPHY_3P3_MIN, HSPHY_3P3_MAX);
  94         if (ret)
  95                 goto off_vdd;
  96
  97         ret = regulator_enable(qphy->v3p3);
  98         if (ret)
  99                 goto off_vdd;
 100
 101         ret = regulator_set_voltage(qphy->v1p8, HSPHY_1P8_MIN, HSPHY_1P8_MAX);
 102         if (ret)
 103                 goto off_3p3;
 104
 105         ret = regulator_enable(qphy->v1p8);
 106         if (ret)
 107                 goto off_3p3;
 108
 109         return 0;
 110
 111 off_3p3:
 112         regulator_disable(qphy->v3p3);
 113 off_vdd:
 114         regulator_disable(qphy->vdd);
 115
 116         return ret;
 117 }
 118
 119 static void phy_8x16_regulators_disable(struct phy_8x16 *qphy)
 120 {
 121         regulator_disable(qphy->v1p8);
 122         regulator_disable(qphy->v3p3);
 123         regulator_disable(qphy->vdd);
 124 }
 125
 126 static int phy_8x16_notify_connect(struct usb_phy *phy,
 127                                    enum usb_device_speed speed)
 128 {
 129         struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
 130         u32 val;
 131
 132         val = ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT;
 133         usb_phy_io_write(&qphy->phy, val, ULPI_SET(ULPI_MISC_A));
 134
 135         val = readl(qphy->regs + HSPHY_USBCMD);
 136         val |= HSPHY_SESS_VLD_CTRL;
 137         writel(val, qphy->regs + HSPHY_USBCMD);
 138
 139         return 0;
 140 }
 141
 142 static int phy_8x16_notify_disconnect(struct usb_phy *phy,
 143                                       enum usb_device_speed speed)
 144 {
 145         struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
 146         u32 val;
 147
 148         val = ULPI_MISC_A_VBUSVLDEXT | ULPI_MISC_A_VBUSVLDEXTSEL;
 149         usb_phy_io_write(&qphy->phy, val, ULPI_CLR(ULPI_MISC_A));
 150
 151         val = readl(qphy->regs + HSPHY_USBCMD);
 152         val &= ~HSPHY_SESS_VLD_CTRL;
 153         writel(val, qphy->regs + HSPHY_USBCMD);
 154
 155         return 0;
 156 }
 157
 158 static int phy_8x16_vbus_on(struct phy_8x16 *qphy)
 159 {
 160         phy_8x16_notify_connect(&qphy->phy, USB_SPEED_UNKNOWN);
 161
 162         /* Switch D+/D- lines to Device connector */
 163         gpiod_set_value_cansleep(qphy->switch_gpio, 0);
 164
 165         return 0;
 166 }
 167
 168 static int phy_8x16_vbus_off(struct phy_8x16 *qphy)
 169 {
 170         phy_8x16_notify_disconnect(&qphy->phy, USB_SPEED_UNKNOWN);
 171
 172         /* Switch D+/D- lines to USB HUB */
 173         gpiod_set_value_cansleep(qphy->switch_gpio, 1);
 174
 175         return 0;
 176 }
 177
 178 static int phy_8x16_vbus_notify(struct notifier_block *nb, unsigned long event,
 179                                 void *ptr)
 180 {
 181         struct phy_8x16 *qphy = container_of(nb, struct phy_8x16, vbus_notify);
 182
 183         if (event)
 184                 phy_8x16_vbus_on(qphy);
 185         else
 186                 phy_8x16_vbus_off(qphy);
 187
 188         return NOTIFY_DONE;
 189 }
 190
 191 static int phy_8x16_init(struct usb_phy *phy)
 192 {
 193         struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
 194         u32 val, init[] = {0x44, 0x6B, 0x24, 0x13};
 195         u32 addr = ULPI_EXT_VENDOR_SPECIFIC;
 196         int idx, state;
 197
 198         for (idx = 0; idx < ARRAY_SIZE(init); idx++)
 199                 usb_phy_io_write(phy, init[idx], addr + idx);
 200
 201         reset_control_reset(qphy->phy_reset);
 202
 203         /* Assert USB HSPHY_POR */
 204         val = readl(qphy->regs + HSPHY_CTRL);
 205         val |= HSPHY_POR_ASSERT;
 206         writel(val, qphy->regs + HSPHY_CTRL);
 207
 208         /*
 209          * wait for minimum 10 microseconds as suggested in HPG.
 210          * Use a slightly larger value since the exact value didn't
 211          * work 100% of the time.
 212          */
 213         usleep_range(12, 15);
 214
 215         /* Deassert USB HSPHY_POR */
 216         val = readl(qphy->regs + HSPHY_CTRL);
 217         val &= ~HSPHY_POR_ASSERT;
 218         writel(val, qphy->regs + HSPHY_CTRL);
 219
 220         usleep_range(10, 15);
 221
 222         writel(0x00, qphy->regs + HSPHY_AHBBURST);
 223         writel(0x08, qphy->regs + HSPHY_AHBMODE);
 224
 225         /* workaround for rx buffer collision issue */
 226         val = readl(qphy->regs + HSPHY_GENCONFIG);
 227         val &= ~HSPHY_TXFIFO_IDLE_FORCE_DIS;
 228         writel(val, qphy->regs + HSPHY_GENCONFIG);
 229
 230         val = readl(qphy->regs + HSPHY_GENCONFIG_2);
 231         val |= HSPHY_SESS_VLD_CTRL_EN;
 232         writel(val, qphy->regs + HSPHY_GENCONFIG_2);
 233
 234         val = ULPI_PWR_OTG_COMP_DISABLE;
 235         usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG));
 236
 237         state = extcon_get_cable_state_(qphy->vbus_edev, EXTCON_USB);
 238         if (state)
 239                 phy_8x16_vbus_on(qphy);
 240         else
 241                 phy_8x16_vbus_off(qphy);
 242
 243         val = usb_phy_io_read(&qphy->phy, ULPI_FUNC_CTRL);
 244         val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
 245         val |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
 246         usb_phy_io_write(&qphy->phy, val, ULPI_FUNC_CTRL);
 247
 248         return 0;
 249 }
 250
 251 static void phy_8x16_shutdown(struct usb_phy *phy)
 252 {
 253         u32 val;
 254
 255         /* Put the controller in non-driving mode */
 256         val = usb_phy_io_read(phy, ULPI_FUNC_CTRL);
 257         val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
 258         val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
 259         usb_phy_io_write(phy, val, ULPI_FUNC_CTRL);
 260 }
 261
 262 static int phy_8x16_read_devicetree(struct phy_8x16 *qphy)
 263 {
 264         struct regulator_bulk_data regs[3];
 265         struct device *dev = qphy->phy.dev;
 266         int ret;
 267
 268         qphy->core_clk = devm_clk_get(dev, "core");
 269         if (IS_ERR(qphy->core_clk))
 270                 return PTR_ERR(qphy->core_clk);
 271
 272         qphy->iface_clk = devm_clk_get(dev, "iface");
 273         if (IS_ERR(qphy->iface_clk))
 274                 return PTR_ERR(qphy->iface_clk);
 275
 276         regs[0].supply = "v3p3";
 277         regs[1].supply = "v1p8";
 278         regs[2].supply = "vddcx";
 279
 280         ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(regs), regs);
 281         if (ret)
 282                 return ret;
 283
 284         qphy->v3p3 = regs[0].consumer;
 285         qphy->v1p8 = regs[1].consumer;
 286         qphy->vdd  = regs[2].consumer;
 287
 288         qphy->phy_reset = devm_reset_control_get(dev, "phy");
 289         if (IS_ERR(qphy->phy_reset))
 290                 return PTR_ERR(qphy->phy_reset);
 291
 292         qphy->switch_gpio = devm_gpiod_get_optional(dev, "switch",
 293                                                    GPIOD_OUT_LOW);
 294         if (IS_ERR(qphy->switch_gpio))
 295                 return PTR_ERR(qphy->switch_gpio);
 296
 297         return 0;
 298 }
 299
 300 static int phy_8x16_reboot_notify(struct notifier_block *this,
 301                                   unsigned long code, void *unused)
 302 {
 303         struct phy_8x16 *qphy;
 304
 305         qphy = container_of(this, struct phy_8x16, reboot_notify);
 306
 307         /*
 308          * Ensure that D+/D- lines are routed to uB connector, so
 309          * we could load bootloader/kernel at next reboot_notify
 310          */
 311         gpiod_set_value_cansleep(qphy->switch_gpio, 0);
 312         return NOTIFY_DONE;
 313 }
 314
 315 static int phy_8x16_probe(struct platform_device *pdev)
 316 {
 317         struct phy_8x16 *qphy;
 318         struct resource *res;
 319         struct usb_phy *phy;
 320         int ret;
 321
 322         qphy = devm_kzalloc(&pdev->dev, sizeof(*qphy), GFP_KERNEL);
 323         if (!qphy)
 324                 return -ENOMEM;
 325
 326         platform_set_drvdata(pdev, qphy);
 327
 328         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 329         if (!res)
 330                 return -EINVAL;
 331
 332         qphy->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 333         if (!qphy->regs)
 334                 return -ENOMEM;
 335
 336         phy                     = &qphy->phy;
 337         phy->dev                = &pdev->dev;
 338         phy->label              = dev_name(&pdev->dev);
 339         phy->init               = phy_8x16_init;
 340         phy->shutdown           = phy_8x16_shutdown;
 341         phy->notify_connect     = phy_8x16_notify_connect;
 342         phy->notify_disconnect  = phy_8x16_notify_disconnect;
 343         phy->io_priv            = qphy->regs + HSPHY_ULPI_VIEWPORT;
 344         phy->io_ops             = &ulpi_viewport_access_ops;
 345         phy->type               = USB_PHY_TYPE_USB2;
 346
 347         ret = phy_8x16_read_devicetree(qphy);
 348         if (ret < 0)
 349                 return ret;
 350
 351         qphy->vbus_edev = extcon_get_edev_by_phandle(phy->dev, 0);
 352         if (IS_ERR(qphy->vbus_edev))
 353                 return PTR_ERR(qphy->vbus_edev);
 354
 355         ret = clk_set_rate(qphy->core_clk, INT_MAX);
 356         if (ret < 0)
 357                 dev_dbg(phy->dev, "Can't boost core clock\n");
 358
 359         ret = clk_prepare_enable(qphy->core_clk);
 360         if (ret < 0)
 361                 return ret;
 362
 363         ret = clk_prepare_enable(qphy->iface_clk);
 364         if (ret < 0)
 365                 goto off_core;
 366
 367         ret = phy_8x16_regulators_enable(qphy);
 368         if (0 && ret)
 369                 goto off_clks;
 370
 371         qphy->vbus_notify.notifier_call = phy_8x16_vbus_notify;
 372         ret = extcon_register_notifier(qphy->vbus_edev, EXTCON_USB,
 373                                        &qphy->vbus_notify);
 374         if (ret < 0)
 375                 goto off_power;
 376
 377         ret = usb_add_phy_dev(&qphy->phy);
 378         if (ret)
 379                 goto off_extcon;
 380
 381         qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify;
 382         register_reboot_notifier(&qphy->reboot_notify);
 383
 384         return 0;
 385
 386 off_extcon:
 387         extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
 388                                    &qphy->vbus_notify);
 389 off_power:
 390         phy_8x16_regulators_disable(qphy);
 391 off_clks:
 392         clk_disable_unprepare(qphy->iface_clk);
 393 off_core:
 394         clk_disable_unprepare(qphy->core_clk);
 395         return ret;
 396 }
 397
 398 static int phy_8x16_remove(struct platform_device *pdev)
 399 {
 400         struct phy_8x16 *qphy = platform_get_drvdata(pdev);
 401
 402         unregister_reboot_notifier(&qphy->reboot_notify);
 403         extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
 404                                    &qphy->vbus_notify);
 405
 406         /*
 407          * Ensure that D+/D- lines are routed to uB connector, so
 408          * we could load bootloader/kernel at next reboot_notify
 409          */
 410         gpiod_set_value_cansleep(qphy->switch_gpio, 0);
 411
 412         usb_remove_phy(&qphy->phy);
 413
 414         clk_disable_unprepare(qphy->iface_clk);
 415         clk_disable_unprepare(qphy->core_clk);
 416         phy_8x16_regulators_disable(qphy);
 417         return 0;
 418 }
 419
 420 static const struct of_device_id phy_8x16_dt_match[] = {
 421         { .compatible = "qcom,usb-8x16-phy" },
 422         { }
 423 };
 424 MODULE_DEVICE_TABLE(of, phy_8x16_dt_match);
 425
 426 static struct platform_driver phy_8x16_driver = {
 427         .probe  = phy_8x16_probe,
 428         .remove = phy_8x16_remove,
 429         .driver = {
 430                 .name = "phy-qcom-8x16-usb",
 431                 .of_match_table = phy_8x16_dt_match,
 432         },
 433 };
 434 module_platform_driver(phy_8x16_driver);
 435
 436 MODULE_LICENSE("GPL v2");
 437 MODULE_DESCRIPTION("Qualcomm APQ8016/MSM8916 chipsets USB transceiver driver");