drivers/usb/host/ehci-fsl.c

   1 /*
   2  * Copyright 2005-2009 MontaVista Software, Inc.
   3  * Copyright 2008,2012      Freescale Semiconductor, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2 of the License, or (at your
   8  * option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software Foundation,
  17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
  20  * by Hunter Wu.
  21  * Power Management support by Dave Liu <daveliu@freescale.com>,
  22  * Jerry Huang <Chang-Ming.Huang@freescale.com> and
  23  * Anton Vorontsov <avorontsov@ru.mvista.com>.
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/types.h>
  28 #include <linux/delay.h>
  29 #include <linux/pm.h>
  30 #include <linux/err.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/fsl_devices.h>
  33
  34 #include "ehci-fsl.h"
  35
  36 /* configure so an HC device and id are always provided */
  37 /* always called with process context; sleeping is OK */
  38
  39 /**
  40  * usb_hcd_fsl_probe - initialize FSL-based HCDs
  41  * @drvier: Driver to be used for this HCD
  42  * @pdev: USB Host Controller being probed
  43  * Context: !in_interrupt()
  44  *
  45  * Allocates basic resources for this USB host controller.
  46  *
  47  */
  48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
  49                              struct platform_device *pdev)
  50 {
  51         struct fsl_usb2_platform_data *pdata;
  52         struct usb_hcd *hcd;
  53         struct resource *res;
  54         int irq;
  55         int retval;
  56
  57         pr_debug("initializing FSL-SOC USB Controller\n");
  58
  59         /* Need platform data for setup */
  60         pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
  61         if (!pdata) {
  62                 dev_err(&pdev->dev,
  63                         "No platform data for %s.\n", dev_name(&pdev->dev));
  64                 return -ENODEV;
  65         }
  66
  67         /*
  68          * This is a host mode driver, verify that we're supposed to be
  69          * in host mode.
  70          */
  71         if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  72               (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
  73               (pdata->operating_mode == FSL_USB2_DR_OTG))) {
  74                 dev_err(&pdev->dev,
  75                         "Non Host Mode configured for %s. Wrong driver linked.\n",
  76                         dev_name(&pdev->dev));
  77                 return -ENODEV;
  78         }
  79
  80         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  81         if (!res) {
  82                 dev_err(&pdev->dev,
  83                         "Found HC with no IRQ. Check %s setup!\n",
  84                         dev_name(&pdev->dev));
  85                 return -ENODEV;
  86         }
  87         irq = res->start;
  88
  89         hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
  90         if (!hcd) {
  91                 retval = -ENOMEM;
  92                 goto err1;
  93         }
  94
  95         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  96         if (!res) {
  97                 dev_err(&pdev->dev,
  98                         "Found HC with no register addr. Check %s setup!\n",
  99                         dev_name(&pdev->dev));
 100                 retval = -ENODEV;
 101                 goto err2;
 102         }
 103         hcd->rsrc_start = res->start;
 104         hcd->rsrc_len = resource_size(res);
 105         if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
 106                                 driver->description)) {
 107                 dev_dbg(&pdev->dev, "controller already in use\n");
 108                 retval = -EBUSY;
 109                 goto err2;
 110         }
 111         hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
 112
 113         if (hcd->regs == NULL) {
 114                 dev_dbg(&pdev->dev, "error mapping memory\n");
 115                 retval = -EFAULT;
 116                 goto err3;
 117         }
 118
 119         pdata->regs = hcd->regs;
 120
 121         if (pdata->power_budget)
 122                 hcd->power_budget = pdata->power_budget;
 123
 124         /*
 125          * do platform specific init: check the clock, grab/config pins, etc.
 126          */
 127         if (pdata->init && pdata->init(pdev)) {
 128                 retval = -ENODEV;
 129                 goto err4;
 130         }
 131
 132         /* Enable USB controller, 83xx or 8536 */
 133         if (pdata->have_sysif_regs)
 134                 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
 135
 136         /* Don't need to set host mode here. It will be done by tdi_reset() */
 137
 138         retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
 139         if (retval != 0)
 140                 goto err4;
 141
 142 #ifdef CONFIG_USB_OTG
 143         if (pdata->operating_mode == FSL_USB2_DR_OTG) {
 144                 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 145
 146                 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
 147                 dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
 148                         hcd, ehci, hcd->phy);
 149
 150                 if (!IS_ERR_OR_NULL(hcd->phy)) {
 151                         retval = otg_set_host(hcd->phy->otg,
 152                                               &ehci_to_hcd(ehci)->self);
 153                         if (retval) {
 154                                 usb_put_phy(hcd->phy);
 155                                 goto err4;
 156                         }
 157                 } else {
 158                         dev_err(&pdev->dev, "can't find phy\n");
 159                         retval = -ENODEV;
 160                         goto err4;
 161                 }
 162         }
 163 #endif
 164         return retval;
 165
 166       err4:
 167         iounmap(hcd->regs);
 168       err3:
 169         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 170       err2:
 171         usb_put_hcd(hcd);
 172       err1:
 173         dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
 174         if (pdata->exit)
 175                 pdata->exit(pdev);
 176         return retval;
 177 }
 178
 179 /* may be called without controller electrically present */
 180 /* may be called with controller, bus, and devices active */
 181
 182 /**
 183  * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
 184  * @dev: USB Host Controller being removed
 185  * Context: !in_interrupt()
 186  *
 187  * Reverses the effect of usb_hcd_fsl_probe().
 188  *
 189  */
 190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
 191                                struct platform_device *pdev)
 192 {
 193         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
 194
 195         if (!IS_ERR_OR_NULL(hcd->phy)) {
 196                 otg_set_host(hcd->phy->otg, NULL);
 197                 usb_put_phy(hcd->phy);
 198         }
 199
 200         usb_remove_hcd(hcd);
 201
 202         /*
 203          * do platform specific un-initialization:
 204          * release iomux pins, disable clock, etc.
 205          */
 206         if (pdata->exit)
 207                 pdata->exit(pdev);
 208         iounmap(hcd->regs);
 209         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 210         usb_put_hcd(hcd);
 211 }
 212
 213 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 214                                enum fsl_usb2_phy_modes phy_mode,
 215                                unsigned int port_offset)
 216 {
 217         u32 portsc;
 218         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 219         void __iomem *non_ehci = hcd->regs;
 220         struct device *dev = hcd->self.controller;
 221         struct fsl_usb2_platform_data *pdata = dev->platform_data;
 222
 223         if (pdata->controller_ver < 0) {
 224                 dev_warn(hcd->self.controller, "Could not get controller version\n");
 225                 return -ENODEV;
 226         }
 227
 228         portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
 229         portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
 230
 231         switch (phy_mode) {
 232         case FSL_USB2_PHY_ULPI:
 233                 if (pdata->have_sysif_regs && pdata->controller_ver) {
 234                         /* controller version 1.6 or above */
 235                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
 236                                         ULPI_PHY_CLK_SEL);
 237                         /*
 238                          * Due to controller issue of PHY_CLK_VALID in ULPI
 239                          * mode, we set USB_CTRL_USB_EN before checking
 240                          * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
 241                          */
 242                         clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
 243                                         UTMI_PHY_EN, USB_CTRL_USB_EN);
 244                 }
 245                 portsc |= PORT_PTS_ULPI;
 246                 break;
 247         case FSL_USB2_PHY_SERIAL:
 248                 portsc |= PORT_PTS_SERIAL;
 249                 break;
 250         case FSL_USB2_PHY_UTMI_WIDE:
 251                 portsc |= PORT_PTS_PTW;
 252                 /* fall through */
 253         case FSL_USB2_PHY_UTMI:
 254                 if (pdata->have_sysif_regs && pdata->controller_ver) {
 255                         /* controller version 1.6 or above */
 256                         setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 257                         mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
 258                                                 become stable - 10ms*/
 259                 }
 260                 /* enable UTMI PHY */
 261                 if (pdata->have_sysif_regs)
 262                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
 263                                   CTRL_UTMI_PHY_EN);
 264                 portsc |= PORT_PTS_UTMI;
 265                 break;
 266         case FSL_USB2_PHY_NONE:
 267                 break;
 268         }
 269
 270         if (pdata->have_sysif_regs && pdata->controller_ver &&
 271             (phy_mode == FSL_USB2_PHY_ULPI)) {
 272                 /* check PHY_CLK_VALID to get phy clk valid */
 273                 if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
 274                                 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
 275                         printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
 276                         return -EINVAL;
 277                 }
 278         }
 279
 280         ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
 281
 282         if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
 283                 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
 284
 285         return 0;
 286 }
 287
 288 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 289 {
 290         struct usb_hcd *hcd = ehci_to_hcd(ehci);
 291         struct fsl_usb2_platform_data *pdata;
 292         void __iomem *non_ehci = hcd->regs;
 293
 294         pdata = hcd->self.controller->platform_data;
 295
 296         if (pdata->have_sysif_regs) {
 297                 /*
 298                 * Turn on cache snooping hardware, since some PowerPC platforms
 299                 * wholly rely on hardware to deal with cache coherent
 300                 */
 301
 302                 /* Setup Snooping for all the 4GB space */
 303                 /* SNOOP1 starts from 0x0, size 2G */
 304                 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
 305                 /* SNOOP2 starts from 0x80000000, size 2G */
 306                 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
 307         }
 308
 309         if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
 310                         (pdata->operating_mode == FSL_USB2_DR_OTG))
 311                 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 312                         return -EINVAL;
 313
 314         if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
 315                 unsigned int chip, rev, svr;
 316
 317                 svr = mfspr(SPRN_SVR);
 318                 chip = svr >> 16;
 319                 rev = (svr >> 4) & 0xf;
 320
 321                 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
 322                 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
 323                         ehci->has_fsl_port_bug = 1;
 324
 325                 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
 326                         if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 327                                 return -EINVAL;
 328
 329                 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
 330                         if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
 331                                 return -EINVAL;
 332         }
 333
 334         if (pdata->have_sysif_regs) {
 335 #ifdef CONFIG_FSL_SOC_BOOKE
 336                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
 337                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
 338 #else
 339                 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
 340                 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
 341 #endif
 342                 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
 343         }
 344
 345         return 0;
 346 }
 347
 348 /* called after powerup, by probe or system-pm "wakeup" */
 349 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
 350 {
 351         if (ehci_fsl_usb_setup(ehci))
 352                 return -EINVAL;
 353
 354         return 0;
 355 }
 356
 357 /* called during probe() after chip reset completes */
 358 static int ehci_fsl_setup(struct usb_hcd *hcd)
 359 {
 360         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 361         int retval;
 362         struct fsl_usb2_platform_data *pdata;
 363         struct device *dev;
 364
 365         dev = hcd->self.controller;
 366         pdata = hcd->self.controller->platform_data;
 367         ehci->big_endian_desc = pdata->big_endian_desc;
 368         ehci->big_endian_mmio = pdata->big_endian_mmio;
 369
 370         /* EHCI registers start at offset 0x100 */
 371         ehci->caps = hcd->regs + 0x100;
 372
 373 #ifdef CONFIG_PPC_83xx
 374         /*
 375          * Deal with MPC834X that need port power to be cycled after the power
 376          * fault condition is removed. Otherwise the state machine does not
 377          * reflect PORTSC[CSC] correctly.
 378          */
 379         ehci->need_oc_pp_cycle = 1;
 380 #endif
 381
 382         hcd->has_tt = 1;
 383
 384         retval = ehci_setup(hcd);
 385         if (retval)
 386                 return retval;
 387
 388         if (of_device_is_compatible(dev->parent->of_node,
 389                                     "fsl,mpc5121-usb2-dr")) {
 390                 /*
 391                  * set SBUSCFG:AHBBRST so that control msgs don't
 392                  * fail when doing heavy PATA writes.
 393                  */
 394                 ehci_writel(ehci, SBUSCFG_INCR8,
 395                             hcd->regs + FSL_SOC_USB_SBUSCFG);
 396         }
 397
 398         retval = ehci_fsl_reinit(ehci);
 399         return retval;
 400 }
 401
 402 struct ehci_fsl {
 403         struct ehci_hcd ehci;
 404
 405 #ifdef CONFIG_PM
 406         /* Saved USB PHY settings, need to restore after deep sleep. */
 407         u32 usb_ctrl;
 408 #endif
 409 };
 410
 411 #ifdef CONFIG_PM
 412
 413 #ifdef CONFIG_PPC_MPC512x
 414 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 415 {
 416         struct usb_hcd *hcd = dev_get_drvdata(dev);
 417         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 418         struct fsl_usb2_platform_data *pdata = dev->platform_data;
 419         u32 tmp;
 420
 421 #ifdef DEBUG
 422         u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
 423         mode &= USBMODE_CM_MASK;
 424         tmp = ehci_readl(ehci, hcd->regs + 0x140);      /* usbcmd */
 425
 426         dev_dbg(dev, "suspend=%d already_suspended=%d "
 427                 "mode=%d  usbcmd %08x\n", pdata->suspended,
 428                 pdata->already_suspended, mode, tmp);
 429 #endif
 430
 431         /*
 432          * If the controller is already suspended, then this must be a
 433          * PM suspend.  Remember this fact, so that we will leave the
 434          * controller suspended at PM resume time.
 435          */
 436         if (pdata->suspended) {
 437                 dev_dbg(dev, "already suspended, leaving early\n");
 438                 pdata->already_suspended = 1;
 439                 return 0;
 440         }
 441
 442         dev_dbg(dev, "suspending...\n");
 443
 444         ehci->rh_state = EHCI_RH_SUSPENDED;
 445         dev->power.power_state = PMSG_SUSPEND;
 446
 447         /* ignore non-host interrupts */
 448         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 449
 450         /* stop the controller */
 451         tmp = ehci_readl(ehci, &ehci->regs->command);
 452         tmp &= ~CMD_RUN;
 453         ehci_writel(ehci, tmp, &ehci->regs->command);
 454
 455         /* save EHCI registers */
 456         pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
 457         pdata->pm_command &= ~CMD_RUN;
 458         pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
 459         pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
 460         pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
 461         pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
 462         pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
 463         pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
 464         pdata->pm_configured_flag  =
 465                 ehci_readl(ehci, &ehci->regs->configured_flag);
 466         pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
 467         pdata->pm_usbgenctrl = ehci_readl(ehci,
 468                                           hcd->regs + FSL_SOC_USB_USBGENCTRL);
 469
 470         /* clear the W1C bits */
 471         pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
 472
 473         pdata->suspended = 1;
 474
 475         /* clear PP to cut power to the port */
 476         tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
 477         tmp &= ~PORT_POWER;
 478         ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
 479
 480         return 0;
 481 }
 482
 483 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 484 {
 485         struct usb_hcd *hcd = dev_get_drvdata(dev);
 486         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 487         struct fsl_usb2_platform_data *pdata = dev->platform_data;
 488         u32 tmp;
 489
 490         dev_dbg(dev, "suspend=%d already_suspended=%d\n",
 491                 pdata->suspended, pdata->already_suspended);
 492
 493         /*
 494          * If the controller was already suspended at suspend time,
 495          * then don't resume it now.
 496          */
 497         if (pdata->already_suspended) {
 498                 dev_dbg(dev, "already suspended, leaving early\n");
 499                 pdata->already_suspended = 0;
 500                 return 0;
 501         }
 502
 503         if (!pdata->suspended) {
 504                 dev_dbg(dev, "not suspended, leaving early\n");
 505                 return 0;
 506         }
 507
 508         pdata->suspended = 0;
 509
 510         dev_dbg(dev, "resuming...\n");
 511
 512         /* set host mode */
 513         tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
 514         ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
 515
 516         ehci_writel(ehci, pdata->pm_usbgenctrl,
 517                     hcd->regs + FSL_SOC_USB_USBGENCTRL);
 518         ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
 519                     hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
 520
 521         ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
 522
 523         /* restore EHCI registers */
 524         ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
 525         ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
 526         ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
 527         ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
 528         ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
 529         ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
 530         ehci_writel(ehci, pdata->pm_configured_flag,
 531                     &ehci->regs->configured_flag);
 532         ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
 533
 534         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 535         ehci->rh_state = EHCI_RH_RUNNING;
 536         dev->power.power_state = PMSG_ON;
 537
 538         tmp = ehci_readl(ehci, &ehci->regs->command);
 539         tmp |= CMD_RUN;
 540         ehci_writel(ehci, tmp, &ehci->regs->command);
 541
 542         usb_hcd_resume_root_hub(hcd);
 543
 544         return 0;
 545 }
 546 #else
 547 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 548 {
 549         return 0;
 550 }
 551
 552 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 553 {
 554         return 0;
 555 }
 556 #endif /* CONFIG_PPC_MPC512x */
 557
 558 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
 559 {
 560         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 561
 562         return container_of(ehci, struct ehci_fsl, ehci);
 563 }
 564
 565 static int ehci_fsl_drv_suspend(struct device *dev)
 566 {
 567         struct usb_hcd *hcd = dev_get_drvdata(dev);
 568         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 569         void __iomem *non_ehci = hcd->regs;
 570
 571         if (of_device_is_compatible(dev->parent->of_node,
 572                                     "fsl,mpc5121-usb2-dr")) {
 573                 return ehci_fsl_mpc512x_drv_suspend(dev);
 574         }
 575
 576         ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
 577                         device_may_wakeup(dev));
 578         if (!fsl_deep_sleep())
 579                 return 0;
 580
 581         ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
 582         return 0;
 583 }
 584
 585 static int ehci_fsl_drv_resume(struct device *dev)
 586 {
 587         struct usb_hcd *hcd = dev_get_drvdata(dev);
 588         struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 589         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 590         void __iomem *non_ehci = hcd->regs;
 591
 592         if (of_device_is_compatible(dev->parent->of_node,
 593                                     "fsl,mpc5121-usb2-dr")) {
 594                 return ehci_fsl_mpc512x_drv_resume(dev);
 595         }
 596
 597         ehci_prepare_ports_for_controller_resume(ehci);
 598         if (!fsl_deep_sleep())
 599                 return 0;
 600
 601         usb_root_hub_lost_power(hcd->self.root_hub);
 602
 603         /* Restore USB PHY settings and enable the controller. */
 604         out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
 605
 606         ehci_reset(ehci);
 607         ehci_fsl_reinit(ehci);
 608
 609         return 0;
 610 }
 611
 612 static int ehci_fsl_drv_restore(struct device *dev)
 613 {
 614         struct usb_hcd *hcd = dev_get_drvdata(dev);
 615
 616         usb_root_hub_lost_power(hcd->self.root_hub);
 617         return 0;
 618 }
 619
 620 static struct dev_pm_ops ehci_fsl_pm_ops = {
 621         .suspend = ehci_fsl_drv_suspend,
 622         .resume = ehci_fsl_drv_resume,
 623         .restore = ehci_fsl_drv_restore,
 624 };
 625
 626 #define EHCI_FSL_PM_OPS         (&ehci_fsl_pm_ops)
 627 #else
 628 #define EHCI_FSL_PM_OPS         NULL
 629 #endif /* CONFIG_PM */
 630
 631 #ifdef CONFIG_USB_OTG
 632 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
 633 {
 634         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 635         u32 status;
 636
 637         if (!port)
 638                 return -EINVAL;
 639
 640         port--;
 641
 642         /* start port reset before HNP protocol time out */
 643         status = readl(&ehci->regs->port_status[port]);
 644         if (!(status & PORT_CONNECT))
 645                 return -ENODEV;
 646
 647         /* khubd will finish the reset later */
 648         if (ehci_is_TDI(ehci)) {
 649                 writel(PORT_RESET |
 650                        (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
 651                        &ehci->regs->port_status[port]);
 652         } else {
 653                 writel(PORT_RESET, &ehci->regs->port_status[port]);
 654         }
 655
 656         return 0;
 657 }
 658 #else
 659 #define ehci_start_port_reset   NULL
 660 #endif /* CONFIG_USB_OTG */
 661
 662
 663 static const struct hc_driver ehci_fsl_hc_driver = {
 664         .description = hcd_name,
 665         .product_desc = "Freescale On-Chip EHCI Host Controller",
 666         .hcd_priv_size = sizeof(struct ehci_fsl),
 667
 668         /*
 669          * generic hardware linkage
 670          */
 671         .irq = ehci_irq,
 672         .flags = HCD_USB2 | HCD_MEMORY,
 673
 674         /*
 675          * basic lifecycle operations
 676          */
 677         .reset = ehci_fsl_setup,
 678         .start = ehci_run,
 679         .stop = ehci_stop,
 680         .shutdown = ehci_shutdown,
 681
 682         /*
 683          * managing i/o requests and associated device resources
 684          */
 685         .urb_enqueue = ehci_urb_enqueue,
 686         .urb_dequeue = ehci_urb_dequeue,
 687         .endpoint_disable = ehci_endpoint_disable,
 688         .endpoint_reset = ehci_endpoint_reset,
 689
 690         /*
 691          * scheduling support
 692          */
 693         .get_frame_number = ehci_get_frame,
 694
 695         /*
 696          * root hub support
 697          */
 698         .hub_status_data = ehci_hub_status_data,
 699         .hub_control = ehci_hub_control,
 700         .bus_suspend = ehci_bus_suspend,
 701         .bus_resume = ehci_bus_resume,
 702         .start_port_reset = ehci_start_port_reset,
 703         .relinquish_port = ehci_relinquish_port,
 704         .port_handed_over = ehci_port_handed_over,
 705
 706         .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
 707 };
 708
 709 static int ehci_fsl_drv_probe(struct platform_device *pdev)
 710 {
 711         if (usb_disabled())
 712                 return -ENODEV;
 713
 714         /* FIXME we only want one one probe() not two */
 715         return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
 716 }
 717
 718 static int ehci_fsl_drv_remove(struct platform_device *pdev)
 719 {
 720         struct usb_hcd *hcd = platform_get_drvdata(pdev);
 721
 722         /* FIXME we only want one one remove() not two */
 723         usb_hcd_fsl_remove(hcd, pdev);
 724         return 0;
 725 }
 726
 727 MODULE_ALIAS("platform:fsl-ehci");
 728
 729 static struct platform_driver ehci_fsl_driver = {
 730         .probe = ehci_fsl_drv_probe,
 731         .remove = ehci_fsl_drv_remove,
 732         .shutdown = usb_hcd_platform_shutdown,
 733         .driver = {
 734                 .name = "fsl-ehci",
 735                 .pm = EHCI_FSL_PM_OPS,
 736         },
 737 };