drivers/usb/dwc_otg_310/usbdev_rk32.c

   1
   2 #include "usbdev_rk.h"
   3 #include "usbdev_grf_regs.h"
   4 #include "dwc_otg_regs.h"
   5 static struct dwc_otg_control_usb *control_usb;
   6
   7 static int usb_get_chip_id(void)
   8 {
   9         return control_usb->chip_id;
  10 }
  11
  12 #ifdef CONFIG_USB20_OTG
  13 static void usb20otg_hw_init(void)
  14 {
  15 #ifndef CONFIG_USB20_HOST
  16         //enable soft control
  17         control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
  18         // enter suspend
  19         control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
  20 #endif
  21         /* usb phy config init
  22          * usb phy enter usb mode */
  23         control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
  24
  25         /* other haredware init,include:
  26          * DRV_VBUS GPIO init */
  27 //      gpio_direction_output(control_usb->otg_gpios->gpio, 0);
  28
  29 }
  30
  31 static void usb20otg_phy_suspend(void* pdata, int suspend)
  32 {
  33         struct dwc_otg_platform_data *usbpdata=pdata;
  34
  35         if(suspend){
  36                 //enable soft control
  37                 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
  38                 //enter suspend
  39                 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
  40                 usbpdata->phy_status = 1;
  41         }else{
  42                 // exit suspend.
  43                 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
  44                 usbpdata->phy_status = 0;
  45         }
  46 }
  47
  48 static void usb20otg_soft_reset(void)
  49 {
  50 }
  51
  52 static void usb20otg_clock_init(void* pdata)
  53 {
  54         /*
  55         struct dwc_otg_platform_data *usbpdata=pdata;
  56         struct clk* ahbclk,*phyclk;
  57
  58         ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
  59         if (IS_ERR(ahbclk)) {
  60                 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
  61                 return;
  62         }
  63
  64         phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
  65         if (IS_ERR(phyclk)) {
  66                 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
  67                 return;
  68         }
  69
  70         usbpdata->phyclk = phyclk;
  71         usbpdata->ahbclk = ahbclk;
  72         */
  73 }
  74
  75 static void usb20otg_clock_enable(void* pdata, int enable)
  76 {
  77         /*
  78         struct dwc_otg_platform_data *usbpdata=pdata;
  79
  80         if(enable){
  81                 clk_prepare_enable(usbpdata->ahbclk);
  82                 clk_prepare_enable(usbpdata->phyclk);
  83         }else{
  84                 clk_disable_unprepare(usbpdata->ahbclk);
  85                 clk_disable_unprepare(usbpdata->phyclk);
  86         }*/
  87 }
  88
  89 static int usb20otg_get_status(int id)
  90 {
  91         int ret = -1;
  92
  93         switch(id){
  94                 case USB_STATUS_BVABLID:
  95                         // bvalid in grf
  96                         ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
  97                         break;
  98                 case USB_STATUS_DPDM:
  99                         // dpdm in grf
 100                         ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
 101                         break;
 102                 case USB_STATUS_ID:
 103                         // id in grf
 104                         ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
 105                         break;
 106                 default:
 107                         break;
 108         }
 109
 110         return ret;
 111 }
 112
 113 #ifdef CONFIG_RK_USB_UART
 114 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
 115 {
 116         if(1 == enter_usb_uart_mode){
 117                 /* bypass dm, enter uart mode*/
 118                 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
 119
 120         }else if(0 == enter_usb_uart_mode){
 121                 /* enter usb mode */
 122                 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
 123         }
 124 }
 125 #endif
 126
 127 static void usb20otg_power_enable(int enable)
 128 {       /*
 129         if(0 == enable){//disable otg_drv power
 130                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
 131         }else if(1 == enable){//enable otg_drv power
 132                 gpio_set_value(control_usb->otg_gpios->gpio, 1);
 133         }*/
 134 }
 135
 136
 137 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
 138         .phyclk = NULL,
 139         .ahbclk = NULL,
 140         .busclk = NULL,
 141         .phy_status = 0,
 142         .hw_init = usb20otg_hw_init,
 143         .phy_suspend = usb20otg_phy_suspend,
 144         .soft_reset = usb20otg_soft_reset,
 145         .clock_init = usb20otg_clock_init,
 146         .clock_enable = usb20otg_clock_enable,
 147         .get_status = usb20otg_get_status,
 148         .get_chip_id = usb_get_chip_id,
 149
 150         .power_enable = usb20otg_power_enable,
 151 #ifdef CONFIG_RK_USB_UART
 152         .dwc_otg_uart_mode = dwc_otg_uart_mode,
 153 #endif
 154     .bc_detect_cb=usb20otg_battery_charger_detect_cb,
 155 };
 156
 157 #endif
 158
 159 #ifdef CONFIG_USB20_HOST
 160
 161 static void usb20host_hw_init(void)
 162 {
 163         /* usb phy config init */
 164
 165         /* other haredware init,include:
 166          * DRV_VBUS GPIO init */
 167 //      gpio_direction_output(control_usb->host_gpios->gpio, 1);
 168 }
 169
 170 static void usb20host_phy_suspend(void* pdata, int suspend)
 171 {
 172         struct dwc_otg_platform_data *usbpdata=pdata;
 173
 174         if(suspend){
 175                 // enable soft control
 176                 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
 177                 // enter suspend
 178                 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
 179                 usbpdata->phy_status = 1;
 180         }else{
 181                 //exit suspend.
 182                 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
 183                 usbpdata->phy_status = 0;
 184         }
 185 }
 186
 187 static void usb20host_soft_reset(void)
 188 {
 189 }
 190
 191 static void usb20host_clock_init(void* pdata)
 192 {
 193         /*
 194         struct dwc_otg_platform_data *usbpdata=pdata;
 195         struct clk* ahbclk,*phyclk;
 196
 197         ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
 198         if (IS_ERR(ahbclk)) {
 199                 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
 200                 return;
 201         }
 202
 203         phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
 204         if (IS_ERR(phyclk)) {
 205                 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
 206                 return;
 207         }
 208
 209         usbpdata->phyclk = phyclk;
 210         usbpdata->ahbclk = ahbclk;
 211         */
 212 }
 213
 214 static void usb20host_clock_enable(void* pdata, int enable)
 215 {
 216         /*
 217         struct dwc_otg_platform_data *usbpdata=pdata;
 218
 219         if(enable){
 220                 clk_prepare_enable(usbpdata->ahbclk);
 221                 clk_prepare_enable(usbpdata->phyclk);
 222         }else{
 223                 clk_disable_unprepare(usbpdata->ahbclk);
 224                 clk_disable_unprepare(usbpdata->phyclk);
 225         }
 226         */
 227 }
 228
 229 static int usb20host_get_status(int id)
 230 {
 231         int ret = -1;
 232
 233         switch(id){
 234                 case USB_STATUS_BVABLID:
 235                         // bvalid in grf
 236                         ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
 237                         break;
 238                 case USB_STATUS_DPDM:
 239                         // dpdm in grf
 240                         ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
 241                         break;
 242                 case USB_STATUS_ID:
 243                         // id in grf
 244                         ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
 245                         break;
 246                 default:
 247                         break;
 248         }
 249
 250         return ret;
 251 }
 252
 253 static void usb20host_power_enable(int enable)
 254 {       /*
 255         if(0 == enable){//disable host_drv power
 256                 //do not disable power in default
 257         }else if(1 == enable){//enable host_drv power
 258                 gpio_set_value(control_usb->host_gpios->gpio, 1);
 259         }*/
 260 }
 261
 262
 263 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
 264         .phyclk = NULL,
 265         .ahbclk = NULL,
 266         .busclk = NULL,
 267         .phy_status = 0,
 268         .hw_init = usb20host_hw_init,
 269         .phy_suspend = usb20host_phy_suspend,
 270         .soft_reset = usb20host_soft_reset,
 271         .clock_init = usb20host_clock_init,
 272         .clock_enable = usb20host_clock_enable,
 273         .get_status = usb20host_get_status,
 274         .get_chip_id = usb_get_chip_id,
 275         .power_enable = usb20host_power_enable,
 276 };
 277
 278 #endif
 279
 280 #ifdef CONFIG_USB_EHCI_RKHSIC
 281 static void rk_hsic_hw_init(void)
 282 {
 283         // usb phy config init
 284         // hsic phy config init, set hsicphy_txsrtune
 285         control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
 286
 287         /* other haredware init
 288          * set common_on, in suspend mode, otg/host PLL blocks remain powered
 289          */
 290
 291
 292         /* change INCR to INCR16 or INCR8(beats less than 16)
 293          * or INCR4(beats less than 8) or SINGLE(beats less than 4)
 294          */
 295         control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
 296 }
 297
 298 static void rk_hsic_clock_init(void* pdata)
 299 {
 300         /* By default, hsicphy_480m's parent is otg phy 480MHz clk
 301          * rk3188 must use host phy 480MHz clk, because if otg bypass
 302          * to uart mode, otg phy 480MHz clk will be closed automatically
 303          */
 304         /*
 305         struct rkehci_platform_data *usbpdata=pdata;
 306         struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_usbphy1;
 307
 308         phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
 309         if (IS_ERR(phyclk480m_hsic)) {
 310                 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
 311                 return;
 312         }
 313
 314         phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
 315         if (IS_ERR(phyclk12m_hsic)) {
 316                 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
 317                 return;
 318         }
 319
 320         phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy1");
 321         if (IS_ERR(phyclk_usbphy1)) {
 322                 dev_err(usbpdata->dev, "Failed to get hsic_usbphy1\n");
 323                 return;
 324         }
 325
 326         ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
 327         if (IS_ERR(ahbclk)) {
 328                 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
 329                 return;
 330         }
 331
 332         clk_set_parent(phyclk480m_hsic, phyclk_usbphy1);
 333
 334         usbpdata->hclk_hsic = ahbclk;
 335         usbpdata->hsic_phy_480m = phyclk480m_hsic;
 336         usbpdata->hsic_phy_12m = phyclk12m_hsic;
 337         */
 338 }
 339
 340 static void rk_hsic_clock_enable(void* pdata, int enable)
 341 {
 342         /*
 343         struct rkehci_platform_data *usbpdata=pdata;
 344
 345         if(enable == usbpdata->clk_status)
 346                 return;
 347         if(enable){
 348                 clk_prepare_enable(usbpdata->hclk_hsic);
 349                 clk_prepare_enable(usbpdata->hsic_phy_480m);
 350                 clk_prepare_enable(usbpdata->hsic_phy_12m);
 351                 usbpdata->clk_status = 1;
 352         }else{
 353                 clk_disable_unprepare(usbpdata->hclk_hsic);
 354                 clk_disable_unprepare(usbpdata->hsic_phy_480m);
 355                 clk_disable_unprepare(usbpdata->hsic_phy_12m);
 356                 usbpdata->clk_status = 0;
 357         }
 358         */
 359 }
 360
 361 static void rk_hsic_soft_reset(void)
 362 {
 363 }
 364
 365 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
 366         .hclk_hsic = NULL,
 367         .hsic_phy_12m = NULL,
 368         .hsic_phy_480m = NULL,
 369         .clk_status = -1,
 370         .hw_init = rk_hsic_hw_init,
 371         .clock_init = rk_hsic_clock_init,
 372         .clock_enable = rk_hsic_clock_enable,
 373         .soft_reset = rk_hsic_soft_reset,
 374         .get_chip_id = usb_get_chip_id,
 375 };
 376 #endif
 377
 378 #ifdef CONFIG_USB_EHCI_RK
 379 static void rk_ehci_hw_init(void)
 380 {
 381
 382 }
 383
 384 static void rk_ehci_clock_init(void* pdata)
 385 {
 386
 387 }
 388
 389 static void rk_ehci_clock_enable(void* pdata, int enable)
 390 {
 391
 392 }
 393
 394 static void rk_ehci_soft_reset(void)
 395 {
 396
 397 }
 398
 399 struct rkehci_platform_data rkehci_pdata_rk3288 = {
 400         .phyclk = NULL,
 401         .ahbclk = NULL,
 402         .clk_status = -1,
 403         .hw_init = rk_ehci_hw_init,
 404         .clock_init = rk_ehci_clock_init,
 405         .clock_enable = rk_ehci_clock_enable,
 406         .soft_reset = rk_ehci_soft_reset,
 407         .get_chip_id = usb_get_chip_id,
 408 };
 409 #endif
 410
 411 #ifdef CONFIG_USB_OHCI_HCD_RK
 412 static void rk_ohci_hw_init(void)
 413 {
 414 }
 415
 416 static void rk_ohci_clock_init(void* pdata)
 417 {
 418 }
 419
 420 static void rk_ohci_clock_enable(void* pdata, int enable)
 421 {
 422 }
 423
 424 static void rk_ohci_soft_reset(void)
 425 {
 426 }
 427
 428 struct rkehci_platform_data rkohci_pdata_rk3288 = {
 429         .phyclk = NULL,
 430         .ahbclk = NULL,
 431         .clk_status = -1,
 432         .hw_init = rk_ohci_hw_init,
 433         .clock_init = rk_ohci_clock_init,
 434         .clock_enable = rk_ohci_clock_enable,
 435         .soft_reset = rk_ohci_soft_reset,
 436         .get_chip_id = usb_get_chip_id,
 437 };
 438 #endif
 439
 440 /*********************************************************************
 441                         rk3288 usb detections
 442 *********************************************************************/
 443
 444 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 445 #define WAKE_LOCK_TIMEOUT (HZ * 10)
 446 inline static void do_wakeup(struct work_struct *work)
 447 {
 448 //      rk28_send_wakeup_key();
 449 }
 450 #endif
 451
 452 /********** handler for bvalid irq **********/
 453 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
 454 {
 455         /* clear irq */
 456         control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
 457
 458 #ifdef CONFIG_RK_USB_UART
 459         /* usb otg dp/dm switch to usb phy */
 460         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
 461 #endif
 462
 463 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 464         wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
 465         schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
 466 #endif
 467
 468         return IRQ_HANDLED;
 469 }
 470
 471 /***** handler for otg id rise and fall edge *****/
 472 static irqreturn_t id_irq_handler(int irq, void *dev_id)
 473 {
 474     unsigned int uoc_con;
 475
 476      /* clear irq */
 477     uoc_con = control_usb->grf_uoc0_base->CON4;
 478
 479     if(uoc_con & (1<<5))//id rise
 480     {
 481         control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
 482     }
 483
 484     if(uoc_con & (1<<7))//id fall
 485     {
 486 #ifdef CONFIG_RK_USB_UART
 487         /* usb otg dp/dm switch to usb phy */
 488         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
 489 #endif
 490         control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
 491     }
 492
 493     schedule_delayed_work(&control_usb->usb_wakelock, HZ/10);
 494     return IRQ_HANDLED;
 495 }
 496
 497 /***** handler for otg line status change *****/
 498
 499 static irqreturn_t line_irq_handler(int irq, void *dev_id)
 500 {
 501     unsigned int uoc_con;
 502     /* clear irq */
 503
 504     if(control_usb->grf_uoc0_base->CON0 & 1<<15){
 505         control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
 506     }
 507
 508     if(control_usb->grf_uoc1_base->CON0 & 1<<15){
 509         control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
 510     }
 511
 512     if(control_usb->grf_uoc2_base->CON0 & 1<<15){
 513         control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
 514     }
 515     /* wake up system*/
 516     //schedule_delayed_work(&usb_det_wakeup_work, HZ/10);
 517     return IRQ_HANDLED;
 518 }
 519
 520 /************* register usb detection irqs **************/
 521 static int otg_irq_detect_init(struct platform_device *pdev)
 522 {
 523         int ret = 0;
 524         int irq = 0;
 525
 526 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
 527         wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
 528         INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
 529 #endif
 530
 531     /*register otg_bvalid irq*/
 532         irq = platform_get_irq_byname(pdev, "otg_bvalid");
 533         if (irq > 0) {
 534                 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
 535                 if(ret < 0)
 536                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 537         else
 538                     control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
 539         }
 540
 541     /*register otg_id irq*/
 542     irq = platform_get_irq_byname(pdev, "otg_id");
 543     if(irq > 0){
 544         ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
 545         if(ret < 0)
 546                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 547                 else
 548                     control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
 549     }
 550
 551     /*register otg_linestate irq*/
 552     irq = platform_get_irq_byname(pdev, "otg_linestate");
 553     if(irq > 0){
 554         ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
 555         if(ret < 0)
 556                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 557                 else
 558                     control_usb->grf_uoc0_base->CON0 = 0xc000c000;
 559     }
 560
 561     /*register host0_linestate irq*/
 562     irq = platform_get_irq_byname(pdev, "host0_linestate");
 563     if(irq > 0){
 564         ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
 565         if(ret < 0)
 566                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 567                 else
 568                     control_usb->grf_uoc1_base->CON0 = 0xc000c000;
 569     }
 570
 571     /*register host1_linestate irq*/
 572     irq = platform_get_irq_byname(pdev, "host1_linestate");
 573     if(irq > 0){
 574         ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
 575         if(ret < 0)
 576                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 577                 else
 578                     control_usb->grf_uoc2_base->CON0 = 0xc000c000;
 579     }
 580
 581         return ret;
 582 }
 583
 584 /********** end of rk3288 usb detections **********/
 585
 586 static int usb_grf_ioremap(struct platform_device *pdev)
 587 {
 588         int ret = 0;
 589         struct resource *res;
 590         void *grf_soc_status1;
 591         void *grf_soc_status2;
 592         void *grf_soc_status19;
 593         void *grf_soc_status21;
 594         void *grf_uoc0_base;
 595         void *grf_uoc1_base;
 596         void *grf_uoc2_base;
 597         void *grf_uoc3_base;
 598         void *grf_uoc4_base;
 599
 600         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 601                                                 "GRF_SOC_STATUS1");
 602         grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
 603         if (IS_ERR(grf_soc_status1)){
 604                 ret = PTR_ERR(grf_soc_status1);
 605                 return ret;
 606         }
 607         control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
 608
 609         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 610                                                 "GRF_SOC_STATUS2");
 611         grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
 612         if (IS_ERR(grf_soc_status2)){
 613                 ret = PTR_ERR(grf_soc_status2);
 614                 return ret;
 615         }
 616         control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
 617
 618         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 619                                                 "GRF_SOC_STATUS19");
 620         grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
 621         if (IS_ERR(grf_soc_status19)){
 622                 ret = PTR_ERR(grf_soc_status19);
 623                 return ret;
 624         }
 625         control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
 626
 627         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 628                                                 "GRF_SOC_STATUS21");
 629         grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
 630         if (IS_ERR(grf_soc_status21)){
 631                 ret = PTR_ERR(grf_soc_status21);
 632                 return ret;
 633         }
 634         control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
 635
 636         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 637                                                 "GRF_UOC0_BASE");
 638         grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
 639         if (IS_ERR(grf_uoc0_base)){
 640                 ret = PTR_ERR(grf_uoc0_base);
 641                 return ret;
 642         }
 643         control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
 644
 645         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 646                                                 "GRF_UOC1_BASE");
 647         grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
 648         if (IS_ERR(grf_uoc1_base)){
 649                 ret = PTR_ERR(grf_uoc1_base);
 650                 return ret;
 651         }
 652         control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
 653
 654         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 655                                                 "GRF_UOC2_BASE");
 656         grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
 657         if (IS_ERR(grf_uoc2_base)){
 658                 ret = PTR_ERR(grf_uoc2_base);
 659                 return ret;
 660         }
 661         control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
 662
 663         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 664                                                 "GRF_UOC3_BASE");
 665         grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
 666         if (IS_ERR(grf_uoc3_base)){
 667                 ret = PTR_ERR(grf_uoc3_base);
 668                 return ret;
 669         }
 670         control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
 671
 672         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 673                                                 "GRF_UOC4_BASE");
 674         grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
 675         if (IS_ERR(grf_uoc4_base)){
 676                 ret = PTR_ERR(grf_uoc4_base);
 677                 return ret;
 678         }
 679         control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
 680
 681         return ret;
 682 }
 683
 684 #ifdef CONFIG_OF
 685
 686 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
 687         {
 688                 .compatible = "rockchip,rk3288-dwc-control-usb",
 689         },
 690         { },
 691 };
 692
 693 #endif
 694
 695 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
 696 {
 697         int gpio, err;
 698         struct device_node *np = pdev->dev.of_node;
 699 //      struct clk* hclk_usb_peri;
 700         int ret = 0;
 701
 702         control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
 703         if (!control_usb) {
 704                 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
 705                 ret =  -ENOMEM;
 706                 goto err1;
 707         }
 708
 709         control_usb->chip_id = RK3288_USB_CTLR;
 710 /*      disable for debug
 711         hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
 712         if (IS_ERR(hclk_usb_peri)) {
 713                 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
 714                 ret = -EINVAL;
 715                 goto err1;
 716         }
 717
 718         control_usb->hclk_usb_peri = hclk_usb_peri;
 719         clk_prepare_enable(hclk_usb_peri);
 720 */
 721         ret = usb_grf_ioremap(pdev);
 722         if(ret){
 723                 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
 724                 goto err2;
 725         }
 726 /*
 727         control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 728
 729         gpio =  of_get_named_gpio(np, "gpios", 0);
 730         if(!gpio_is_valid(gpio)){
 731                 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
 732                 ret = -EINVAL;
 733                 goto err2;
 734         }
 735         control_usb->host_gpios->gpio = gpio;
 736         err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
 737         if (err) {
 738                 dev_err(&pdev->dev,
 739                         "failed to request GPIO%d for host_drv\n",
 740                         gpio);
 741                 ret = err;
 742                 goto err2;
 743         }
 744
 745         control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 746
 747         gpio =  of_get_named_gpio(np, "gpios", 1);
 748         if(!gpio_is_valid(gpio)){
 749                 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
 750                 ret = -EINVAL;
 751                 goto err2;
 752         }
 753         control_usb->otg_gpios->gpio = gpio;
 754         err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
 755         if (err) {
 756                 dev_err(&pdev->dev,
 757                         "failed to request GPIO%d for otg_drv\n",
 758                         gpio);
 759                 ret = err;
 760                 goto err2;
 761         }
 762 */
 763         ret = otg_irq_detect_init(pdev);
 764         if (ret < 0)
 765                 goto err2;
 766
 767         return 0;
 768
 769 err2:
 770 //      disable for debug
 771 //      clk_disable_unprepare(hclk_usb_peri);
 772 err1:
 773         return ret;
 774 }
 775
 776 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
 777 {
 778 //      disable for debug
 779 //      clk_disable_unprepare(control_usb->hclk_usb_peri);
 780         return 0;
 781 }
 782
 783 static struct platform_driver dwc_otg_control_usb_driver = {
 784         .probe          = dwc_otg_control_usb_probe,
 785         .remove         = dwc_otg_control_usb_remove,
 786         .driver         = {
 787                 .name   = "rk3288-dwc-control-usb",
 788                 .owner  = THIS_MODULE,
 789                 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
 790         },
 791 };
 792
 793 static int __init dwc_otg_control_usb_init(void)
 794 {
 795         return platform_driver_register(&dwc_otg_control_usb_driver);
 796 }
 797
 798 subsys_initcall(dwc_otg_control_usb_init);
 799
 800 static void __exit dwc_otg_control_usb_exit(void)
 801 {
 802         platform_driver_unregister(&dwc_otg_control_usb_driver);
 803 }
 804
 805 module_exit(dwc_otg_control_usb_exit);
 806 MODULE_ALIAS("platform: dwc_control_usb");
 807 MODULE_AUTHOR("RockChip Inc.");
 808 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
 809 MODULE_LICENSE("GPL v2");